From: Koji Matsuoka <koji.matsuoka...@renesas.com>

Init the Generic Timer for V3U Falcon in early phase

Signed-off-by: Koji Matsuoka <koji.matsuoka...@renesas.com>
Signed-off-by: Hai Pham <hai.pham...@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
---
 board/renesas/falcon/falcon.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index 3e591e4b42..c3241bc21d 100644
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -20,6 +20,31 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CPGWPR         0xE6150000
 #define CPGWPCR                0xE6150004
 
+#define EXTAL_CLK      16666600u
+#define CNTCR_BASE     0xE6080000
+#define CNTFID0                (CNTCR_BASE + 0x020)
+#define CNTCR_EN       BIT(0)
+
+static void init_generic_timer(void)
+{
+       u32 freq;
+
+       /* Set frequency data in CNTFID0 */
+       freq = EXTAL_CLK;
+
+       /* Update memory mapped and register based freqency */
+       asm volatile ("msr cntfrq_el0, %0" :: "r" (freq));
+       writel(freq, CNTFID0);
+
+       /* Enable counter */
+       setbits_le32(CNTCR_BASE, CNTCR_EN);
+}
+
+void s_init(void)
+{
+       init_generic_timer();
+}
+
 int board_early_init_f(void)
 {
        /* Unlock CPG access */
-- 
2.30.2

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