On Mon, 2021-03-29 at 21:27 +0200, Fabien Parent wrote:
> Add MT8175 SoC support.
>
> Signed-off-by: Fabien Parent <fpar...@baylibre.com>
> ---
> arch/arm/dts/mt8175.dtsi | 247 +++++++++++++++++++++++++
> arch/arm/mach-mediatek/Kconfig | 9 +
> arch/arm/mach-mediatek/Makefile | 1 +
> arch/arm/mach-mediatek/mt8175/Makefile | 3 +
> arch/arm/mach-mediatek/mt8175/init.c | 75 ++++++++
> 5 files changed, 335 insertions(+)
> create mode 100644 arch/arm/dts/mt8175.dtsi
> create mode 100644 arch/arm/mach-mediatek/mt8175/Makefile
> create mode 100644 arch/arm/mach-mediatek/mt8175/init.c
>
> diff --git a/arch/arm/dts/mt8175.dtsi b/arch/arm/dts/mt8175.dtsi
> new file mode 100644
> index 000000000000..98320e44cd5c
> --- /dev/null
> +++ b/arch/arm/dts/mt8175.dtsi
> @@ -0,0 +1,247 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 MediaTek Inc.
> + * Copyright (C) 2021 BayLibre, SAS
> + * Author: Ben Ho <ben...@mediatek.com>
> + * Erin Lo <erin...@mediatek.com>
> + * Fabien Parent <fpar...@baylibre.com>
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/mt8175-clk.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/phy/phy.h>
> +
> +/ {
> + compatible = "mediatek,mt8175";
> + interrupt-parent = <&sysirq>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
[...]
> + uart2: uart2@11004000 {
> + compatible = "mediatek,mt8175-uart",
> + "mediatek,hsuart";
> + reg = <0 0x11004000 0 0x1000>;
> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&topckgen CLK_TOP_CLK26M>, <&infracfg
> CLK_IFR_UART2>;
> + clock-names = "baud", "bus";
> + status = "disabled";
> + };
> +
> + mmc0: mmc@11230000 {
> + compatible = "mediatek,mt8175-mmc",
> "mediatek,mt8183-mmc";
> + reg = <0 0x11230000 0 0x1000>,
> + <0 0x11cd0000 0 0x1000>;
> + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
> + <&infracfg CLK_IFR_MSDC0_HCLK>,
> + <&infracfg CLK_IFR_MSDC0_SRC>;
> + clock-names = "source", "hclk", "source_cg";
> + status = "disabled";
> + };
> +
> + u3phy: usb-phy@11cc0000 {
> + compatible = "mediatek,generic-tphy-v2";
> + #address-cells = <2>;
<1>
> + #size-cells = <2>;
<1>
> + ranges;
Please use <prop-encoded-array> as following,
ranges = <0 0 0x11cc0000 0x2000>;
> + status = "okay";
> +
> + u2port0: usb-phy@11cc0000 {
u2port0: usb-phy@0
> + reg = <0 0x11cc0000 0 0x400>;
reg = <0 0x400>;
> + clocks = <&topckgen_cg CLK_TOP_SSUSB_PHY_CK_EN>,
> + <&topckgen_cg CLK_TOP_USB20_48M_EN>;
> + clock-names = "ref", "da_ref";
> + #phy-cells = <1>;
> + status = "okay";
> + };
> +
> + u2port1: usb-phy@11cc1000 {
u2port1: usb-phy@1000
> + reg = <0 0x11cc1000 0 0x400>;
reg = <0x1000 0x400>;
> + clocks = <&topckgen_cg CLK_TOP_SSUSB_PHY_CK_EN>,
> + <&topckgen_cg CLK_TOP_USB20_48M_EN>;
> + clock-names = "ref", "da_ref";
> + #phy-cells = <1>;
> + status = "okay";
> + };
> + };
> +
> + usb: usb@11201000 {
> + compatible ="mediatek,mt8175-mtu3", "mediatek,mtu3";
> + reg = <0 0x11200000 0 0x3e00>,
> + <0 0x11203e00 0 0x0100>;
> + reg-names = "mac", "ippc";
No need mac reg, it's in subnode
> + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_LOW>;
remove it, it's also in subnode
> + phys = <&u2port0 PHY_TYPE_USB2>,
> + <&u2port1 PHY_TYPE_USB2>;
> + clocks = <&topckgen_cg CLK_TOP_SSUSB_TOP_CK_EN>,
> + <&infracfg CLK_IFR_SSUSB_REF>,
> + <&infracfg CLK_IFR_SSUSB_SYS>,
> + <&infracfg CLK_IFR_ICUSB>;
> + clock-names = "sys_ck", "ref_ck", "mcu_ck",
> + "dma_ck";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + status = "disabled";
> +
> + ssusb: ssusb@11200000 {
> + compatible = "mediatek,ssusb";
> + reg = <0 0x11200000 0 0x3e00>;
> + reg-names = "mac";
> + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
> + status = "disabled";
> + };
> +
> + usb_host: xhci@11200000 {
> + compatible = "mediatek,mt8175-xhci",
> + "mediatek,mtk-xhci";
> + reg = <0 0x11200000 0 0x1000>;
> + reg-names = "mac";
> + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&topckgen_cg CLK_TOP_SSUSB_TOP_CK_EN>,
> + <&infracfg CLK_IFR_SSUSB_REF>,
> + <&infracfg CLK_IFR_SSUSB_SYS>,
> + <&infracfg CLK_IFR_ICUSB>,
> + <&infracfg CLK_IFR_SSUSB_XHCI>;
> + clock-names = "sys_ck", "ref_ck", "mcu_ck",
> + "dma_ck", "xhci_ck";
> + status = "disabled";
> + };
No need usb_host node if you want support dual-role mode, it's used for
host only IP.
Thanks a lot
> + };
> + };
> +};
