> > What I am confused about is that this patch adds check for > > PHY_INTERFACE_MODE_SGMII_2500 > > in addition to > > PHY_INTERFACE_MODE_2500BASEX > > > > But what is the difference between these two? > > > > Marvell named this protocol HS-SGMII in some of their datasheets and > > code. I guess this was done because of the similarities with 1000base-x and > SGMII. > > Marvell uses the names SGMII and 1000base-x interchangably, although > > this is not correct. I guess they are similarily using names > > 2500base-x and HS-SGMII (and now SGMII_2500) interchangably, which is > also not correct. > > > > SGMII uses the same coding as 1000base-x, but the latter works only > > with one speed (1000mbps), while the former can also work in 10mbps > > and 100mbps (by repeating each byte 100 or 10 times, respectively). > > > > Then there is 2500base-x, which is the same as 1000base-x, but with > > the clock being at 2.5x the speed of 1000base-x clock. > > > > But there is no analogue of the SGMII protocol (i.e. the repearing of > > bytes in order to achieve lower speed) for the 2500base-x. > > > > So what I am confused about here is what is supposed to be the > > difference between > > PHY_INTERFACE_MODE_SGMII_2500 > > and > > PHY_INTERFACE_MODE_2500BASEX > > ? > > > > Marek
I not sure what is correct naming for these mode. PHY_INTERFACE includes both MAC2PHY interfaces(MII, RGMII and etc), PHY2PHY interfaces(like BASEX) and SGMII(which is kind of both). For both 2500BASEX and SGMII_2500 Serdes lanes set to HS-SGMII in 3.125G speed, but MAC configured differently and autoneg cannot be supported. Regards, Stefan.
