Hi, Marek, > -----Original Message----- > From: Marek Behun <marek.be...@nic.cz> > Sent: Wednesday, March 24, 2021 13:47 > To: Kostya Porotchkin <kos...@marvell.com> > Cc: Stefan Roese <s...@denx.de>; u-boot@lists.denx.de; Stefan Chulski > <stef...@marvell.com>; Ramon Fried <rfried....@gmail.com>; Nadav Haklai > <nad...@marvell.com>; Joe Hershberger <joe.hershber...@ni.com>; Marcin > Wojtas <m...@semihalf.com>; sa_ip-sw-jenkins <sa_ip-sw- > jenk...@marvell.com>; Igal Liberman <ig...@marvell.com>; Simon Glass > <s...@chromium.org>; Yan Markman <ymark...@marvell.com> > Subject: Re: [EXT] Re: [PATCH v1 2/5] net: phy: marvell: extend 88E2110 to use > both 2.5GHz modes > > On Wed, 24 Mar 2021 09:55:04 +0000 > Kostya Porotchkin <kos...@marvell.com> wrote: > > > Hi, Marek, > > > > > -----Original Message----- > > > From: Marek Behun <marek.be...@nic.cz> > > > Sent: Wednesday, March 24, 2021 12:44 > > > To: Stefan Roese <s...@denx.de> > > > Cc: u-boot@lists.denx.de; Kostya Porotchkin <kos...@marvell.com>; > > > Stefan Chulski <stef...@marvell.com>; Ramon Fried > > > <rfried....@gmail.com>; Nadav Haklai <nad...@marvell.com>; Joe > > > Hershberger <joe.hershber...@ni.com>; Marcin Wojtas > > > <m...@semihalf.com>; sa_ip-sw- jenkins <sa_ip-sw-jenk...@marvell.com>; > > > Igal Liberman <ig...@marvell.com>; Simon Glass <s...@chromium.org>; > > > Yan Markman <ymark...@marvell.com> > > > Subject: [EXT] Re: [PATCH v1 2/5] net: phy: marvell: extend 88E2110 > > > to use both 2.5GHz modes > > > > > > External Email > > > > > > -------------------------------------------------------------------- > > > -- > > > On Wed, 24 Mar 2021 10:20:05 +0100 > > > Stefan Roese <s...@denx.de> wrote: > > > > > > > PHY_INTERFACE_MODE_SGMII_2500 > > > > > > What the hell is this mode??? > > > > > > AFAIK something like this does not actually exist. > > [KP] I think you are wrong. These modes are definitely exist > > https://urldefense.proofpoint.com/v2/url?u=https-3A__en.wikipedia.org_ > > wiki_2.5GBASE-2DT-5Fand-5F5GBASE- > 2DT&d=DwICAg&c=nKjWec2b6R0mOyPaz7xtfQ > > &r=- > N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=SCz6AxibFIYZS7 > OKXvlPK > > > CJvtAUaDPOmYRpvSNR3jv4&s=R_4D7fksFwBgE8_2RMOIyt5hIs8vgXjimR3E4O > FUXeU&e > > = > > > > Regards > > Kosta > > Hi Kosta, > > the wikipedia page you linked specifies copper modes, not PHY modes. > > We are discussing PHY modes here. [KP] Ahh, sorry, mea culpa. I think Stefan has some answers to your questions.
Regards Kosta > > What I am confused about is that this patch adds check for > PHY_INTERFACE_MODE_SGMII_2500 > in addition to > PHY_INTERFACE_MODE_2500BASEX > > But what is the difference between these two? > > Marvell named this protocol HS-SGMII in some of their datasheets and code. I > guess this was done because of the similarities with 1000base-x and SGMII. > Marvell uses the names SGMII and 1000base-x interchangably, although this is > not correct. I guess they are similarily using names 2500base-x and HS-SGMII > (and now SGMII_2500) interchangably, which is also not correct. > > SGMII uses the same coding as 1000base-x, but the latter works only with one > speed (1000mbps), while the former can also work in 10mbps and 100mbps (by > repeating each byte 100 or 10 times, respectively). > > Then there is 2500base-x, which is the same as 1000base-x, but with the clock > being at 2.5x the speed of 1000base-x clock. > > But there is no analogue of the SGMII protocol (i.e. the repearing of bytes in > order to achieve lower speed) for the 2500base-x. > > So what I am confused about here is what is supposed to be the difference > between > PHY_INTERFACE_MODE_SGMII_2500 > and > PHY_INTERFACE_MODE_2500BASEX > ? > > Marek
