Hi all,
On 04.03.2021 12:24, Stefano Babic wrote:
On 04.03.21 12:18, Fabio Estevam wrote:
Hi Frieder,
On Thu, Mar 4, 2021 at 5:23 AM Frieder Schrempf
<[email protected]> wrote:
Is this still on your list?
It would be great if you could send a patch for this.
Thanks for the reminder. I have just sent the patch.
I forgot it as well, it is just to extend the defconfig. I pick up
Fabio's patch, it will be merged into 2021.04
Stefano
I tested the patch with CONFIG_IMX_HAB=y for an IMX8m and I got some
compiler errors.
A part of the output (in german):
...
CC drivers/crypto/fsl/sec.o
CC drivers/crypto/fsl/jr.o
drivers/crypto/fsl/jr.c:28:21: Fehler: »CONFIG_SYS_FSL_MAX_NUM_OF_SEC«
ist hier nicht deklariert (nicht in einer Funktion)
28 | uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/crypto/fsl/jr.c: In Funktion »start_jr0«:
drivers/crypto/fsl/jr.c:47:2: Fehler: unbekannter Typname: »ccsr_sec_t«
47 | ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
| ^~~~~~~~~~
drivers/crypto/fsl/jr.c:37:4: Fehler: »CONFIG_SYS_FSL_SEC_ADDR« nicht
deklariert (erstmalige Verwendung in dieser Funktion); meinten Sie
»CONFIG_SYS_FSL_ESDHC_ADDR«?
37 | ((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx]))
| ^~~~~~~~~~~~~~~~~~~~~~~
...
The list is long and mostly the compiler cannot found some defines:
CONFIG_SYS_FSL_SEC_ADDR
CONFIG_SYS_FSL_JR0_OFFSET
CONFIG_SYS_FSL_SEC_OFFSET
RDSTA_SKVN
RTSDCTL_ENT_DLY_MIN
RTSDCTL_ENT_DLY_MAX
And this type: ccsr_sec_t
I used for the test:
- Das U-Boot master branch
- Cross compiler: aarch64-linux-gnu-
- This documentation:
https://github.com/u-boot/u-boot/blob/master/doc/board/freescale/imx8mm_evk.rst
- I enable in the menuconfig CONFIG_IMX_HAB and SYS_FSL_SEC_LE
Florian
