On Mon, 8 Feb 2021 20:14:26 +0000 Chris Packham <chris.pack...@alliedtelesis.co.nz> wrote:
> On 9/02/21 8:15 am, Marek Behun wrote: > > This patch is needed on some Turris Omnia boards with Samsung DDR chips, > > otherwise DDR training fails in ~60% of cases. > > > > Marvell send us this patch for testing, I have updated it a little. > > > > Please test this on other A38x boards. > > > > If it doesn't break anything on other boards, we can apply it and send > > it to mv-ddr-marvell upstream. > They gave us the same patch. I was hoping their SoC team would get it > into mv-ddr-marvell (or even their vendor USP) but obviously they're > still sitting on it. I know it improved matters for some of our boards > but it didn't totally fix them we still had yield problems when we > ramped up production. There is a bug in the version they sent us: in file ddr3_training_ip_engine.c there is a line added: if ((bit_bit_mask[sybphy_id] & (1 << bit_id)) == 1) try chaning it to if (bit_bit_mask[sybphy_id] & (1 << bit_id)) This is fixed in the version I sent to mailing list
