commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream.
the twin-die combined memory device should be treatened as X8
device and not as X16 one
Signed-off-by: Moti Buskila <mo...@marvell.com>
Reviewed-by: Kostya Porotchkin <kos...@marvell.com>
The default value for twin_die_combined is set to NOT_COMBINED for all
boards, as this was default behaviour prior this change.
Signed-off-by: Marek Behún <marek.be...@nic.cz>
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 2 ++
board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 1 +
board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 1 +
board/alliedtelesis/x530/x530.c | 1 +
board/gdsys/a38x/controlcenterdc.c | 1 +
board/kobol/helios4/helios4.c | 1 +
board/solidrun/clearfog/clearfog.c | 1 +
drivers/ddr/marvell/a38x/ddr_topology_def.h | 12 ++++++++++++
drivers/ddr/marvell/a38x/mv_ddr_topology.c | 6 +++++-
9 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 2da878d364..78b125edfe 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -285,6 +285,7 @@ static struct mv_ddr_topology_map board_topology_map_1g = {
MV_DDR_TIM_2T} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0} /* timing parameters */
};
@@ -307,6 +308,7 @@ static struct mv_ddr_topology_map board_topology_map_2g = {
MV_DDR_TIM_2T} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0} /* timing parameters */
};
diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
index 9cd9ea2c06..acc8a5ec6d 100644
--- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
+++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
@@ -72,6 +72,7 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_TIM_DEFAULT} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0} /* timing parameters */
};
diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
index 2bdd55329d..a1d0104526 100644
--- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
+++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
@@ -93,6 +93,7 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_TIM_DEFAULT} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0} /* timing parameters */
};
diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index c7438aeaf1..6caba24196 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -67,6 +67,7 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_TIM_2T} }, /* timing */
BUS_MASK_32BIT_ECC, /* subphys mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0}, /* timing parameters */
{ {0} }, /* electrical configuration */
diff --git a/board/gdsys/a38x/controlcenterdc.c
b/board/gdsys/a38x/controlcenterdc.c
index a2287f9deb..66a0d769ce 100644
--- a/board/gdsys/a38x/controlcenterdc.c
+++ b/board/gdsys/a38x/controlcenterdc.c
@@ -70,6 +70,7 @@ static struct mv_ddr_topology_map ddr_topology_map = {
MV_DDR_TIM_DEFAULT} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0} /* timing parameters */
diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c
index 17d2489415..5007194a52 100644
--- a/board/kobol/helios4/helios4.c
+++ b/board/kobol/helios4/helios4.c
@@ -70,6 +70,7 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_TIM_DEFAULT} }, /* timing */
BUS_MASK_32BIT_ECC, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0} /* timing parameters */
};
diff --git a/board/solidrun/clearfog/clearfog.c
b/board/solidrun/clearfog/clearfog.c
index 92443d5177..3166f0abe0 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -141,6 +141,7 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_TIM_DEFAULT} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
{0}, /* timing parameters */
{ {0} }, /* electrical configuration */
diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h
b/drivers/ddr/marvell/a38x/ddr_topology_def.h
index 3991fec272..461f091472 100644
--- a/drivers/ddr/marvell/a38x/ddr_topology_def.h
+++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h
@@ -14,6 +14,11 @@
#define MV_DDR_MAX_BUS_NUM 9
#define MV_DDR_MAX_IFACE_NUM 1
+enum mv_ddr_twin_die {
+ COMBINED,
+ NOT_COMBINED,
+};
+
struct bus_params {
/* Chip Select (CS) bitmask (bits 0-CS0, bit 1- CS1 ...) */
u8 cs_bitmask;
@@ -47,6 +52,9 @@ struct if_params {
/* The DDR frequency for each interfaces */
enum mv_ddr_freq memory_freq;
+ /* ddr twin-die */
+ enum mv_ddr_twin_die twin_die_combined;
+
/*
* delay CAS Write Latency
* - 0 for using default value (jedec suggested)
@@ -113,6 +121,9 @@ struct mv_ddr_topology_map {
/* source of ddr configuration data */
enum mv_ddr_cfg_src cfg_src;
+ /* ddr twin-die */
+ enum mv_ddr_twin_die twin_die_combined;
+
/* raw spd data */
union mv_ddr_spd_data spd_data;
@@ -193,6 +204,7 @@ struct mv_ddr_iface {
/* ddr interface topology map */
struct mv_ddr_topology_map tm;
+
};
struct mv_ddr_iface *mv_ddr_iface_get(void);
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_topology.c
b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
index c4c3ab72b2..2db6283c23 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_topology.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
@@ -127,6 +127,11 @@ int mv_ddr_topology_map_update(void)
speed_bin_index = iface_params->speed_bin_index;
freq = iface_params->memory_freq;
+ if (tm->twin_die_combined == COMBINED) {
+ iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT;
+ iface_params->memory_size -= 1;
+ }
+
if (iface_params->cas_l == 0)
iface_params->cas_l =
mv_ddr_cl_val_get(speed_bin_index, freq);
@@ -281,7 +286,6 @@ unsigned long long mv_ddr_mem_sz_per_cs_get(void)
mem_sz_per_cs = (unsigned long long)mem_size[iface_params->memory_size]
*
(unsigned long long)sphys /
(unsigned long long)sphys_per_dunit;
-
return mem_sz_per_cs;
}
--
2.26.2
