On 1/14/21 12:29 PM, Simon Glass wrote:
> Add a node for this so we can indicate that it is does not require any
> ACPI code.
>
> Signed-off-by: Simon Glass <s...@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.ch...@samsung.com>
Best Regards,
Jaehoon Chung
> ---
>
> arch/x86/dts/chromebook_coral.dts | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/dts/chromebook_coral.dts
> b/arch/x86/dts/chromebook_coral.dts
> index 965f59276af..bfbdd517d1f 100644
> --- a/arch/x86/dts/chromebook_coral.dts
> +++ b/arch/x86/dts/chromebook_coral.dts
> @@ -569,6 +569,12 @@
> acpi,name = "SDCD";
> };
>
> + emmc: emmc@1c,0 {
> + reg = <0x0000e000 0 0 0 0>;
> + compatible = "intel,apl-emmc";
> + non-removable;
> + };
> +
> pch: pch@1f,0 {
> reg = <0x0000f800 0 0 0 0>;
> compatible = "intel,apl-pch";
>
