Am Mittwoch, den 28.10.2020, 15:09 +0100 schrieb Stefan Roese: > Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC. > Here the only 2 instructions are allowed in the first few bytes of the > image. And these instructions need to be one branch and a nop. This > patch adds the necessary nop after the nop, to that the common MIPS > image is compatible with this Octeon header. > > The tool to patch the Octeon boot header into the image will be send in > a follow-up patch. > > Signed-off-by: Stefan Roese <s...@denx.de> > Cc: Aaron Williams <awilli...@marvell.com> > Cc: Chandrakala Chavva <ccha...@marvell.com> > Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com> > --- > v2: > - Enhance comment > - Fix delay slot indentation > > arch/mips/cpu/start.S | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > >
Reviewed-by: Daniel Schwierzeck <daniel.schwierz...@gmail.com> -- - Daniel
