> After starting or setting the rate of a PLL, the enable bit must be set. > > This fixes a bug where the AI ram would not be accessible, because it > requires PLL1 to be running. > > Signed-off-by: Sean Anderson <sean...@gmail.com> > --- > > (no changes since v1) > > drivers/clk/kendryte/pll.c | 2 ++ > 1 file changed, 2 insertions(+) >
Reviewed-by: Rick Chen <r...@andestech.com>
