We can reduce the number of instructions needed to use available_harts_lock
by using the aq and rl suffixes for AMOs.
Signed-off-by: Sean Anderson <sean...@gmail.com>
---
Changes in v2:
- Remove fences after amoswaps
- Reword commit message
arch/riscv/cpu/start.S | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index e3222b1ea7..66ca1c7020 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -125,14 +125,12 @@ call_board_init_f_0:
#ifndef CONFIG_XIP
la t0, available_harts_lock
- fence rw, w
- amoswap.w zero, zero, 0(t0)
+ amoswap.w.rl zero, zero, 0(t0)
wait_for_gd_init:
la t0, available_harts_lock
li t1, 1
-1: amoswap.w t1, t1, 0(t0)
- fence r, rw
+1: amoswap.w.aq t1, t1, 0(t0)
bnez t1, 1b
/* register available harts in the available_harts mask */
@@ -142,8 +140,7 @@ wait_for_gd_init:
or t2, t2, t1
SREG t2, GD_AVAILABLE_HARTS(gp)
- fence rw, w
- amoswap.w zero, zero, 0(t0)
+ amoswap.w.rl zero, zero, 0(t0)
/*
* Continue on hart lottery winner, others branch to
--
2.28.0
