The SPI NOR core will get Octal DTR in following commits. This has presented a significant challenge of keeping the SPL size in check on the x530 platform.
On a previous iteration of the series, adding a set of compile-time switches got the build working. But rebasing on the latest master breaks the build again. We are fighting a losing battle here. Every addition to either the SPI NOR core in the future, or any other core part of U-Boot will potentially lead to the SPL size going beyond the limit and the build failing. To combat this we will have to keep adding more and more compile-time switches, increasing the complexity of the code in the process. This is not sustainable. So use tiny SPI NOR instead. It is designed with size-limited SPL binaries in mind, and will afford us more breathing room. To enable tiny SPI NOR, CONFIG_SPI_FLASH_BAR has to be disabled. Signed-off-by: Pratyush Yadav <p.ya...@ti.com> --- configs/x530_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 890c94b5c1..0570dbe9ea 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -62,7 +62,6 @@ CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_PXA3XX=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=50000000 -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y -- 2.25.0
