> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Monday, August 24, 2020 10:44 PM
> To: u-boot@lists.denx.de; atish.pa...@wdc.com; bmeng...@gmail.com;
> anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick Jian-Zhi Chen(陳建志)
> Cc: paul.walms...@sifive.com; Pragnesh Patel
> Subject: [PATCH 0/3] RISC-V tracing support
>
> This series add a support of tracing for RISC-V arch.
>
> This series is also available here [1] for testing.
> Series depends on [2].
>
> [1] https://github.com/pragnesh26992/u-boot/tree/trace
> [2]
> https://patchwork.ozlabs.org/project/uboot/cover/20200729095636.1077054-1-sean...@gmail.com/
>
> How to test this patch:
> 1) Enable tracing in "configs/sifive_fu540_defconfig"
> CONFIG_TRACE=y
> CONFIG_TRACE_BUFFER_SIZE=0x01000000
> CONFIG_TRACE_CALL_DEPTH_LIMIT=15
> CONFIG_CMD_TRACE=y
>
> 2) make FTRACE=1 sifive_fu540_defconfig
> 3) make FTRACE=1
>
> Following are the boot messages on FU540 five cores SMP platform:
>
> U-Boot 2020.10-rc1-02837-g8613dc2e66 (Aug 24 2020 - 20:03:47 +0530)
>
> CPU: rv64imac
> Model: SiFive HiFive Unleashed A00
> DRAM: 8 GiB
> trace: enabled
> MMC: spi@10050000:mmc@0: 0
> Loading Environment from SPIFlash... SF: Detected is25wp256 with page size
> 256 Bytes, erase size 4 KiB, total 32 MiB
> OK
> In: serial@10010000
> Out: serial@10010000
> Err: serial@10010000
> Board serial number should not be 0 !!
> Net:
> Warning: ethernet@10090000 (eth0) using random MAC address - 92:a1:a7:02:5a:14
> eth0: ethernet@10090000
> Hit any key to stop autoboot: 0
> => trace stats
> 177,722 function sites
> 37,057,350 function calls
> 1 untracked function calls
> 1,279,612 traced function calls (36015585 dropped due to overflow)
> 19 maximum observed call depth
> 15 call depth limit
> 37,055,565 calls not traced due to depth
> =>
>
>
> Pragnesh Patel (3):
> riscv: Add timer_get_us() for tracing
> riscv: Mark riscv_timer_get_count() and sifive_clint_get_count() with
> 'notrace'
> riscv: Mark andes_plmt_get_count() with 'notrace'
>
> arch/riscv/lib/Makefile | 1 +
> arch/riscv/lib/andes_plmt.c | 2 +-
> arch/riscv/lib/sifive_clint.c | 2 +-
> arch/riscv/lib/timer.c | 50 +++++++++++++++++++++++++++++++++++
> drivers/timer/riscv_timer.c | 2 +-
> 5 files changed, 54 insertions(+), 3 deletions(-)
> create mode 100644 arch/riscv/lib/timer.c
>
> --
Tested-by: Rick Chen <r...@andestech.com>
I have verified it in AE350 platfom as below:
U-Boot 2020.10-rc1-05918-g658fb7e-dirty (Sep 03 2020 - 08:08:28 +0800)
DRAM: 1 GiB
trace: enabled
Flash: 64 MiB
MMC: mmc@f0e00000: 0
Loading Environment from SPIFlash... SF: Detected mx25u1635e with page
size 256 Bytes, erase size 4 KiB, total 2 MiB
OK
In: serial@f0300000
Out: serial@f0300000
Err: serial@f0300000
Net: no alias for ethernet0
Warning: mac@e0100000 (eth0) using random MAC address - 2a:6c:3c:57:4b:30
eth0: mac@e0100000
Hit any key to stop autoboot: 0
RISC-V #
RISC-V # trace stats
166,074 function sites
1,071,417 function calls
1 untracked function calls
1,030,665 traced function calls
19 maximum observed call depth
15 call depth limit
1,145,728 calls not traced due to depth
RISC-V # trace stats
166,074 function sites
2,552,905 function calls
1 untracked function calls
1,287,378 traced function calls (958047 dropped due to overflow)
19 maximum observed call depth
15 call depth limit
2,900,311 calls not traced due to depth
RISC-V #
Thanks,
Rick
