This series add a support of tracing for RISC-V arch. This series is also available here [1] for testing. Series depends on [2].
[1] https://github.com/pragnesh26992/u-boot/tree/trace [2] https://patchwork.ozlabs.org/project/uboot/cover/20200729095636.1077054-1-sean...@gmail.com/ How to test this patch: 1) Enable tracing in "configs/sifive_fu540_defconfig" CONFIG_TRACE=y CONFIG_TRACE_BUFFER_SIZE=0x01000000 CONFIG_TRACE_CALL_DEPTH_LIMIT=15 CONFIG_CMD_TRACE=y 2) make FTRACE=1 sifive_fu540_defconfig 3) make FTRACE=1 Following are the boot messages on FU540 five cores SMP platform: U-Boot 2020.10-rc1-02837-g8613dc2e66 (Aug 24 2020 - 20:03:47 +0530) CPU: rv64imac Model: SiFive HiFive Unleashed A00 DRAM: 8 GiB trace: enabled MMC: spi@10050000:mmc@0: 0 Loading Environment from SPIFlash... SF: Detected is25wp256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB OK In: serial@10010000 Out: serial@10010000 Err: serial@10010000 Board serial number should not be 0 !! Net: Warning: ethernet@10090000 (eth0) using random MAC address - 92:a1:a7:02:5a:14 eth0: ethernet@10090000 Hit any key to stop autoboot: 0 => trace stats 177,722 function sites 37,057,350 function calls 1 untracked function calls 1,279,612 traced function calls (36015585 dropped due to overflow) 19 maximum observed call depth 15 call depth limit 37,055,565 calls not traced due to depth => Pragnesh Patel (3): riscv: Add timer_get_us() for tracing riscv: Mark riscv_timer_get_count() and sifive_clint_get_count() with 'notrace' riscv: Mark andes_plmt_get_count() with 'notrace' arch/riscv/lib/Makefile | 1 + arch/riscv/lib/andes_plmt.c | 2 +- arch/riscv/lib/sifive_clint.c | 2 +- arch/riscv/lib/timer.c | 50 +++++++++++++++++++++++++++++++++++ drivers/timer/riscv_timer.c | 2 +- 5 files changed, 54 insertions(+), 3 deletions(-) create mode 100644 arch/riscv/lib/timer.c -- 2.17.1
