Hi Marty, On Mon, 3 Aug 2020 at 07:49, Simon Glass <s...@chromium.org> wrote: > > Hi Marty, > > On Sun, 2 Aug 2020 at 21:02, Simon Glass <s...@chromium.org> wrote: > > > > Hi Marty, > > > > On Fri, 31 Jul 2020 at 12:30, Simon Glass <s...@chromium.org> wrote: > > > > > > Hi Marty, > > > > > > On Fri, 31 Jul 2020 at 05:19, Marty E. Plummer <hanet...@startmail.com> > > > wrote: > > > > > > > > On Tue, Jul 28, 2020 at 12:58:30PM -0600, Simon Glass wrote: > > > > > Hi Marty, > > > > > > > > > > On Tue, 21 Jul 2020 at 21:07, Marty E. Plummer > > > > > <hanet...@startmail.com> wrote: > > > > > > > > > > > > On Tue, Jul 21, 2020 at 10:21:52AM -0600, Simon Glass wrote: > > > > > > > Hi Marty, > > > > > > > > > > > > > > Did you check spl_boot_device()? > > > > > > > > > > > > > After sending the initial email I noticed your binman work, which > > > > > > does > > > > > > some of the stuff I think I need. My current setup is as follows: > > > > > > > > > > > > > > > > > > > Also take a look at the CONFIG_TARGET stuff in the code as it > > > > > > > might > > > > > > > speciy BOB but not KEVIN. > > > > > > Yeah. I worked that in. > > > > > > > > > > > > Currently, a rom which is built with these changes (assuming > > > > > > u-boot.rom > > > > > > is what I want for SPI booting; strange its only 4mb, aren't these > > > > > > devices 8mb flash?) I get no output at all over the servo, aside > > > > > > from > > > > > > the EC. > > > > > > > > > > I think it is only 4MB. > > > > > > > > > Nah, kevin is deffo 8mb flash chip. Otherwise I wouldn't have been able > > > > to shove a 7.xmb kernel+initramfs into a coreboot image and flash it. > > > > > > Well that's odd. Maybe Kevin got a larger device than gru? > > > > > > > > > > > I have to pad the u-boot.rom with dd to flash it. > > > > > I am not sure that I have a kevin. Did you try using the debug UART? > > > > > > > > > Yeah, assuming you mean `dut-control cpu_uart_pty` with a servo hooked > > > > up, and using `socat READLINE /dev/pts/something`. I get no output, but > > > > the same chromiumos chroot with vanilla coreboot+depthcharge and > > > > hardware config does do output as expected. > > > > > > > > Perhaps I'm missing something simple. > > > > > > Probably, it often is. But what?! > > > > > > I actually just found some old Chromebooks I didn't know i had, so I > > > have a Kevin. If you push your tree somewhere I might be able to take > > > a look this weekend. > > > > I dug this out but I cannot get it to boot with the em100 emulator. > > I'll see if I can figure that out at some point. Sometimes I get > > serial garbage as well. > > > > It is surprising that the flash is 8MB when Gru is 4MB. Must have run > > out of room. > > Also I pushed the tree with your changes and one of mine here: > > https://github.com/sjg20/u-boot/tree/kevin
Well I don't know why the em100 doesn't work, but apparently it never did. Anyway the image seems to jump into ATF first, then to U-Boot SPL. So perhaps the problem is in ATF. From what I can tell, it prints about 10 characters of junk before it starts setting up SDRAM. Perhaps it has a clock wrong. In any case, it should be possible to jump directly into U-Boot SPL and hopefully the debug UART works. Can you try that, perhaps by building an image without ATF? Regards, SImon
