Greetings.
I've been working on u-boot for rk3399-gru-kevin, Samsung Chromebook
Plus. In theory it should be fairly similar to the Bob chromebook, and
as such my work is largely based on it. Aside from some trivial changes,
and adding chromebook_kevin_defconfig (direct copy of bob's config, with
bob exchanged for kevin where apropriate) there is no major changes done
(current diff at bottom).
After building, I prepare the image like this:
===============
$ ./tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin idbloader.img
# 0x60000 chosen from doc/board/rockchip/rockchip.rst:187
$ dd if=idbloader.img of=start bs=$((0x60000)) conv=sync count=1
$ cat u-boot.itb >> start
# 8mb spi flash
$ dd if=start of=flash.bin bs=$((1024*1024*8)) conv=sync count=1
===============
and flash it from within a chromeos dev env with a servo, like this:
===============
# power down
$ dut-control spi2_buf_en:on spi2_buf_on_flex_en:on spi2_vref:pp3300
cold_reset:on
# flash
$ sudo flashrom -V --programmer ft2232_spi:type=google-servo-v2 -w flash.bin
# power up
$ dut-control spi2_buf_en:off spi2_buf_on_flex_en:off spi2_vref:off
cold_reset:off
===============
But I do not get any more output than the following: (using the same ddr
config as bob, as it matches what coreboot's source tree has listed
during coreboot's bootup, to the best of my ability to tell.
src/mainboard/google/gru/sdram_params/sdram-lpddr3-generic-4GB-928.c
===============
Channel 0: LPDDR3, 933MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR3, 933MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
256B stride
U-Boot SPL 2020.07-10102-g1c4b5038af-dirty (Jul 19 2020 - 22:04:50 -0500)
SPL: Unsupported Boot Device!
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
===============
Unsure where to proceed from here. I notice that when bob was originally
ported the chosen node had a u-boot,spl-boot-order property and the
config node had u-boot,spl-payload-offset, which is no more, perhaps
there is something to that?
Current changes:
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cee10f533f..0e3e1cc553 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -122,6 +122,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-ficus.dtb \
rk3399-firefly.dtb \
rk3399-gru-bob.dtb \
+ rk3399-gru-kevin.dtb \
rk3399-khadas-edge.dtb \
rk3399-khadas-edge-captain.dtb \
rk3399-khadas-edge-v.dtb \
diff --git a/include/dt-bindings/input/linux-event-codes.h
b/include/dt-bindings/input/linux-event-codes.h
index 87cf351bab..331458c0e7 100644
--- a/include/dt-bindings/input/linux-event-codes.h
+++ b/include/dt-bindings/input/linux-event-codes.h
@@ -749,7 +749,8 @@
#define SW_ROTATE_LOCK 0x0c /* set = rotate locked/disabled */
#define SW_LINEIN_INSERT 0x0d /* set = inserted */
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
-#define SW_MAX 0x0f
+#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
+#define SW_MAX 0x10
#define SW_CNT (SW_MAX+1)
/*
