On 2020/6/8 上午2:36, Patrick Wildt wrote:
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
vop1, but so far we have set it in both conditions, which is not
correct.
Can someone verify this is the correct way round? vop1 -> set,
vop0 -> clear?
Signed-off-by: Patrick Wildt <patr...@blueri.se>
I will take this fix for rk3288 and later you can send support for rk3399.
Reviewed-by: Kever Yang <kever.y...@rock-chips.com>
Thanks,
- Kever
diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 92188be9275..000bd481408 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -1062,7 +1062,8 @@ static int rk_edp_probe(struct udevice *dev)
rk_setreg(&priv->grf->soc_con12, 1 << 4);
/* select epd signal from vop0 or vop1 */
- rk_setreg(&priv->grf->soc_con6, (vop_id == 1) ? (1 << 5) : (1 << 5));
+ rk_clrsetreg(&priv->grf->soc_con6, (1 << 5),
+ (vop_id == 1) ? (1 << 5) : (0 << 5));
rockchip_edp_wait_hpd(priv);
