The clock messages are .. mmc: bus_hz is 99072000, setting clock 150000 Hz, block size 512 mmc: requested clock 150000 is too low; changed to 193500
But I found out, that the AT91Bootstrap initialization impacts the U-Boot code. If I use the AT91Bootstrap (without mci initialization) from NAND flash, the mmc init command successfully reads the card. It fails if I use the AT91Bootstrap with mci initialization. The new driver may help me out of this - so I would be happy to test your patch ;) Best Regards, Alex -----Original Message----- From: Reinhard Meyer [mailto:u-b...@emk-elektronik.de] Sent: Friday, August 13, 2010 8:32 PM To: Schleifer, Alexander Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v2a] AT91: add SD/MMC support Dear Schleifer, Alexander, > Thanks for your reply... > > The CID part is: > mmc: response: 1a50514d 53202020 1018301a ec007b8b > Manufacturer ID: 1A > OEM/Application ID: 5051 > Product name: MS > Product Revision: 1.0 > Product Serial Number: 405805804 > Manufacturing Date: 07/11 > > The CSD part is: > mmc: response: 005e0032 5f5983cf edb6ff87 9640003f raw CSD data: > 005e0032 5f5983cf edb6ff87 9640003f Read block length: 512 > (Supports partial reads) > Card capacity: 244 Mbytes > Warning: Using maximum data timeout > mmc: Using 983040 cycles data timeout (DTOR=0x7f) I miss the clock messages here. Whats the MCK and which divider is calculated? > mmc: bread failed, status = 0040c0e5, card status = 00000900 0040c0e5= DTOE=1(data time out error) TXBUFE=1 RXBUFF=1(rx buffer full) and other bits That seems to me like some timing problem, or a hardware problem, where reading data with slow clock (used to get CID/CSD) works, but reading at several MHz (depending on card) does not work. Besides the clock calculation in this driver rounds the divider down, so on a typical system a 25MHz card will receive a 48 MHz clock instead of a 24 MHz. I figured this out while testing the new driver... If you really want to bother with this now old driver use this excerpt from the new driver: debug("mci: bus_hz is %u, setting clock %u Hz, block size %u\n", bus_hz, hz, blklen); if (hz > 0) { /* find lowest clkdiv yielding a rate <= than requested */ for (clkdiv=0; clkdiv<255; clkdiv++) { if ((bus_hz / (clkdiv+1) / 2) <= hz) break; } } printf("mci: setting clock %u Hz, block size %u\n", (bus_hz / (clkdiv+1)) / 2, blklen); If you have two days patience, wait for the new driver, I will be most happy to have a tester ;) Best Regards, Reinhard _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
