On 1/9/20 12:29 PM, Masahiro Yamada wrote: > On Thu, Jan 9, 2020 at 7:08 PM Marek Vasut <ma...@denx.de> wrote: >> >> While the Denali NAND is initialized by the BootROM in SPL, there >> are still a couple of settings which are missing. These can trigger >> subtle corruption of the data read out of the NAND. Fill these >> settings in just like they are filled in by the full Denali NAND >> driver in denali_hw_init(). >> >> Signed-off-by: Marek Vasut <ma...@denx.de> >> Cc: Masahiro Yamada <yamada.masah...@socionext.com> >> --- >> drivers/mtd/nand/raw/denali_spl.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/mtd/nand/raw/denali_spl.c >> b/drivers/mtd/nand/raw/denali_spl.c >> index dbaba3cab2..b8b29812aa 100644 >> --- a/drivers/mtd/nand/raw/denali_spl.c >> +++ b/drivers/mtd/nand/raw/denali_spl.c >> @@ -173,6 +173,13 @@ void nand_init(void) >> page_size = readl(denali_flash_reg + DEVICE_MAIN_AREA_SIZE); >> oob_size = readl(denali_flash_reg + DEVICE_SPARE_AREA_SIZE); >> pages_per_block = readl(denali_flash_reg + PAGES_PER_BLOCK); >> + >> + /* Do as denali_hw_init() does. */ >> + writel(CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES, >> + denali_flash_reg + SPARE_AREA_SKIP_BYTES); >> + writel(0x0F, denali_flash_reg + RB_PIN_ENABLED); >> + writel(CHIP_EN_DONT_CARE__FLAG, denali_flash_reg + >> CHIP_ENABLE_DONT_CARE); >> + writel(0xffff, denali_flash_reg + SPARE_AREA_MARKER); >> } >> > > You need this because SOCFPGA SPL resets the nand controller, correct? > > https://github.com/u-boot/u-boot/blob/v2020.01/arch/arm/mach-socfpga/spl_gen5.c#L89
Yes. The driver should init the hardware correctly and fully, which it does not do without this patch.
