The DSPI node of DTS in kernel is spi, so fix the "/soc/dspi@"
ot "/soc/spi@".

The DSPI2 and I2C5 is muxed, and the DSPI2 default status is okay,
so must set the DSPI2 status is disabled if the pin use to I2C5.

Signed-off-by: Xiaowei Bao <xiaowei....@nxp.com>
---
 board/freescale/lx2160a/lx2160a.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index eff5d9f..3d7cd8b 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -210,9 +210,9 @@ void esdhc_dspi_status_fixup(void *blob)
 {
        const char esdhc0_path[] = "/soc/esdhc@2140000";
        const char esdhc1_path[] = "/soc/esdhc@2150000";
-       const char dspi0_path[] = "/soc/dspi@2100000";
-       const char dspi1_path[] = "/soc/dspi@2110000";
-       const char dspi2_path[] = "/soc/dspi@2120000";
+       const char dspi0_path[] = "/soc/spi@2100000";
+       const char dspi1_path[] = "/soc/spi@2110000";
+       const char dspi2_path[] = "/soc/spi@2120000";
 
        struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
        u32 sdhc1_base_pmux;
@@ -262,10 +262,12 @@ void esdhc_dspi_status_fixup(void *blob)
                & FSL_CHASSIS3_IIC5_PMUX_MASK;
        iic5_pmux >>= FSL_CHASSIS3_IIC5_PMUX_SHIFT;
 
-       if (iic5_pmux == IIC5_PMUX_SPI3) {
+       if (iic5_pmux == IIC5_PMUX_SPI3)
                do_fixup_by_path(blob, dspi2_path, "status", "okay",
                                 sizeof("okay"), 1);
-       }
+       else
+               do_fixup_by_path(blob, dspi2_path, "status", "disabled",
+                                sizeof("disabled"), 1);
 }
 #endif
 
-- 
2.9.5

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