In case the SPL on Gen5 loads U-Boot from NAND, unreset the NAND IP explicitly in the platform code as the denali-spl driver is not aware of DM at all.
Signed-off-by: Marek Vasut <ma...@denx.de> Cc: Chin Liang See <chin.liang....@intel.com> Cc: Dalon Westergreen <dwest...@gmail.com> Cc: Dinh Nguyen <dingu...@kernel.org> Cc: Ley Foon Tan <ley.foon....@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> Cc: Tien Fong Chee <tien.fong.c...@intel.com> --- arch/arm/mach-socfpga/spl_gen5.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index 47e63709ad..408e409375 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -138,6 +138,13 @@ void board_init_f(ulong dummy) if (ret) debug("Reset init failed: %d\n", ret); +#ifdef CONFIG_SPL_NAND_DENALI + struct socfpga_reset_manager *reset_manager_base = + (struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS; + + clrbits_le32(&reset_manager_base->per_mod_reset, BIT(4)); +#endif + /* enable console uart printing */ preloader_console_init(); -- 2.24.0.432.g9d3f5f5b63 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot