On 2019/11/7 下午7:11, Soeren Moch wrote:
The most important change for u-boot is the fix for the vdd-log pwm
voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
Signed-off-by: Soeren Moch <sm...@web.de>
=2D--
Cc: Kever Yang <kever.y...@rock-chips.com>
Cc: u-boot@lists.denx.de
=2D--
Why is the "=2D- -" here?
Otherwise looks good to me.
Reviewed-by: Kever Yang<kever.y...@rock-chips.com>
Thanks,
- Kever
arch/arm/dts/rk3399-rockpro64.dts | 57 ++++++++++++++++++++++++++-----
1 file changed, 49 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockp=
ro64.dts
index 1f2394e058..e544deb61d 100644
=2D-- a/arch/arm/dts/rk3399-rockpro64.dts
+++ b/arch/arm/dts/rk3399-rockpro64.dts
@@ -58,6 +58,13 @@
};
};
+ fan: pwm-fan {
+ compatible =3D "pwm-fan";
+ #cooling-cells =3D <2>;
+ fan-supply =3D <&vcc12v_dcin>;
+ pwms =3D <&pwm1 0 50000 0>;
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible =3D "mmc-pwrseq-simple";
clocks =3D <&rk808 1>;
@@ -166,7 +173,7 @@
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt =3D <800000>;
- regulator-max-microvolt =3D <1400000>;
+ regulator-max-microvolt =3D <1700000>;
vin-supply =3D <&vcc5v0_sys>;
};
};
@@ -222,6 +229,10 @@
status =3D "okay";
};
+&hdmi_sound {
+ status =3D "okay";
+};
+
&gpu {
mali-supply =3D <&vdd_gpu>;
status =3D "okay";
@@ -236,8 +247,8 @@
rk808: pmic@1b {
compatible =3D "rockchip,rk808";
reg =3D <0x1b>;
- interrupt-parent =3D <&gpio1>;
- interrupts =3D <21 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent =3D <&gpio3>;
+ interrupts =3D <10 IRQ_TYPE_LEVEL_LOW>;
#clock-cells =3D <1>;
clock-output-names =3D "xin32k", "rk808-clkout2";
pinctrl-names =3D "default";
@@ -504,11 +515,25 @@
status =3D "okay";
bt656-supply =3D <&vcc1v8_dvp>;
- audio-supply =3D <&vcca1v8_codec>;
+ audio-supply =3D <&vcc_3v0>;
sdmmc-supply =3D <&vcc_sdio>;
gpio1830-supply =3D <&vcc_3v0>;
};
+&pcie0 {
+ ep-gpios =3D <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+ num-lanes =3D <4>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&pcie_perst>;
+ vpcie12v-supply =3D <&vcc12v_dcin>;
+ vpcie3v3-supply =3D <&vcc3v3_pcie>;
+ status =3D "okay";
+};
+
+&pcie_phy {
+ status =3D "okay";
+};
+
&pmu_io_domains {
pmu1830-supply =3D <&vcc_3v0>;
status =3D "okay";
@@ -538,6 +563,10 @@
};
pcie {
+ pcie_perst: pcie-perst {
+ rockchip,pins =3D <2 RK_PD4 RK_FUNC_GPIO
&pcfg_pull_none>;
+ };
+
pcie_pwr_en: pcie-pwr-en {
rockchip,pins =3D <1 RK_PD0 RK_FUNC_GPIO
&pcfg_pull_none>;
};
@@ -545,7 +574,7 @@
pmic {
pmic_int_l: pmic-int-l {
- rockchip,pins =3D <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins =3D <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
vsel1_gpio: vsel1-gpio {
@@ -580,6 +609,10 @@
status =3D "okay";
};
+&pwm1 {
+ status =3D "okay";
+};
+
&pwm2 {
status =3D "okay";
};
@@ -591,7 +624,6 @@
&sdmmc {
bus-width =3D <4>;
- cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios =3D <&gpio0 7 GPIO_ACTIVE_LOW>;
disable-wp;
@@ -603,12 +635,21 @@
&sdhci {
bus-width =3D <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
+ mmc-hs200-1_8v;
non-removable;
status =3D "okay";
};
+&spi1 {
+ status =3D "okay";
+
+ flash@0 {
+ compatible =3D "jedec,spi-nor";
+ reg =3D <0>;
+ spi-max-frequency =3D <10000000>;
+ };
+};
+
&tcphy0 {
status =3D "okay";
};
=2D-
2.17.1
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