u-boot reset watchdog everywhere in u-boot code. But linux reset watchdog only when you reset /dev/watchdog by ioctl.
You can try to put "mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);" in kernel main.c to keep alive the watchdog. On Sat, Jun 5, 2010 at 4:14 AM, Mark Maestas <maes...@aplabs.com> wrote: > Thanks Wolfgang, > > The board is resetting within u-boot before Linux starts to load. I > added the WATCHDOG_RESET call in common/image.c before and after it is > loading the device tree which is where it gets reset. I figured that if > I reset the watchdog before that process it will give me more time so > that Linux can load and take over. It seems like code was already there > to handle the reset in memmove_wd but it does not seem to be working. > The Linux watchdog code is working great. If I remove watchdog from > u-boot and just do it in Linux it works just fine. I enable BookE > driver in Linux and that works. The other thing that is difficult is > creating a /dev/watchdog node in the blob. Currently I need to do that > in a startup script. I would like to have that in the blob. > > The watchdog_reset function is trying to prevent the interrupt from > happening. It does seem to do the correct thing based on the PPC440 UG. > > Thanks for the help. > > Mark > > -----Original Message----- > From: Wolfgang Denk [mailto:w...@denx.de] > Sent: Friday, June 04, 2010 12:47 PM > To: Mark Maestas > Cc: Detlev Zundel; Stefan Roese; u-boot@lists.denx.de > Subject: Re: [U-Boot] Watchdog support for ppc4xx > > Dear "Mark Maestas", > > In message <b02fcc6065c3164c8228cf04ab049eac0114c...@srv-01.aplabs.com> > you wrote: > > > > I am not having luck with watchdog enabled on the ppc4xx target. The > > board is doing a reset before Linux gets a chance to load. I have > added > > Please define exactly what you mean by "before Linux gets a chance to > load" - is it resetting in U-Boot, or after passsing control to the > Linux kernel? > > > more WATCHDOG_RESET commands in the image file just to see if that > helps > > What does "in the image file" mean? > > > and it does not seem to. Even though the reset function gets called > it > > is still getting reset. According to the ppc 440 documentation the > > By "reset function" you actually mean the code that is supposed to > trigger the watchdog? Otherwise - the reset function is supposed to > reset the system, so everthing would be OK then. > > > TSR[WIS] bit should get cleared to reset the timer and the code is > doing > > that. I don't understand why the board keeps resetting. > > This depends on the hardware, and obviously on the code doing this > (keep in mind that using I/O accessors is mandatory these days). > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > I haven't lost my mind -- it's backed up on tape somewhere. > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot >
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