[U-Boot] [RFC PATCH v2 07/18] arm: dts: socfpga: make clock nodes available in SPL

[Simon Goldschmidt]

The socfpga gen5 clock driver will need some of the clock nodes to be
preserved in the SPL devicetree. Mark them appropriately.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
---

Changes in v2:
- split this patch from v1 5/6

 arch/arm/dts/socfpga-common-u-boot.dtsi | 70 +++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi 
b/arch/arm/dts/socfpga-common-u-boot.dtsi
index aebe476e3f..7bc3b0021f 100644
--- a/arch/arm/dts/socfpga-common-u-boot.dtsi
+++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
@@ -7,6 +7,12 @@
 /{
        soc {
                u-boot,dm-pre-reloc;
+               clkmgr@ffd04000 {
+                       u-boot,dm-pre-reloc;
+                       clocks {
+                               u-boot,dm-pre-reloc;
+                       };
+               };
        };
 };
 
@@ -18,3 +24,67 @@
 &sdr {
        u-boot,dm-pre-reloc;
 };
+
+&osc1 {
+       u-boot,dm-pre-reloc;
+};
+
+&osc2 {
+       u-boot,dm-pre-reloc;
+};
+
+&f2s_periph_ref_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&main_pll {
+       u-boot,dm-pre-reloc;
+};
+
+&mainclk {
+       u-boot,dm-pre-reloc;
+};
+
+&main_qspi_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&main_nand_sdmmc_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&periph_pll {
+       u-boot,dm-pre-reloc;
+};
+
+&per_qspi_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&per_nand_mmc_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&per_base_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&l4_mp_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&l4_sp_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk_divided {
+       u-boot,dm-pre-reloc;
+};
+
+&qspi_clk {
+       u-boot,dm-pre-reloc;
+};
-- 
2.20.1

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