Hi Bin, On Wed, 9 Oct 2019 at 22:57, Bin Meng <bmeng...@gmail.com> wrote: > > Hi Simon, > > On Wed, Sep 25, 2019 at 10:59 PM Simon Glass <s...@chromium.org> wrote: > > > > The Primary-to-Sideband bus (P2SB) is used to access various peripherals > > through memory-mapped I/O in a large chunk of PCI space. The space is > > segmented into different channels and peripherals are accessed by > > device-specific means within those channels. Devices should be added in > > the device tree as subnodes of the p2sb. > > > > Again, I see no value of bringing P2SB to the uclass driver level, > given as of today it is only seen in ApolloLake. Similar mechanism was > seen in old x86 SoCs, and at the old time, it was called "Message > Port", that existed in old Atom SoCs.
OK, I'll make it a SYSCON I suppose. Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
