Set up MTRRs for the FST SDRAM regions to improve performance.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/x86/lib/fsp/fsp_dram.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 9161af65b98..4a87516f422 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -8,6 +8,7 @@
#include <asm/fsp/fsp_support.h>
#include <asm/e820.h>
#include <asm/mrccache.h>
+#include <asm/mtrr.h>
#include <asm/post.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -70,6 +71,8 @@ int dram_init_banksize(void)
gd->bd->bi_dram[0].start = 0;
gd->bd->bi_dram[0].size = low_end;
+ mtrr_add_request(MTRR_TYPE_WRBACK, 0, low_end);
+
return 0;
}
--
2.23.0.444.g18eeb5a265-goog
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