On 5/24/19 1:40 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee <tien.fong.c...@intel.com>
>
> Current implementation almost release all peripherals out of reset for
> gen5, but A10 has more peripherals than gen5, hence this patch is required
> to release the rest of peripherals to support old kernels.
>
> Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
> ---
> drivers/reset/reset-socfpga.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
> index cb8312619f..d8b8b25fc3 100644
> --- a/drivers/reset/reset-socfpga.c
> +++ b/drivers/reset/reset-socfpga.c
> @@ -127,6 +127,9 @@ static int socfpga_reset_remove(struct udevice *dev)
> if (socfpga_reset_keep_enabled()) {
> puts("Deasserting all peripheral resets\n");
> writel(0, data->modrst_base + 4);
> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> + writel(0, data->modrst_base + 8);
This should be using match on compatible string.
Which register is this modrst_base + 8 ?
> +#endif
> }
>
> return 0;
>
--
Best regards,
Marek Vasut
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