On Fri, May 10, 2019 at 07:00:19AM -0500, Adam Ford wrote: > On Sat, Mar 9, 2019 at 6:03 PM Adam Ford <aford...@gmail.com> wrote: > > > > This converts the following to Kconfig: > > CONFIG_NAND > > > > A bunch of boards have dependent NAND drivers, and CONFIG_NAND > > is already in Kconfig, so this patch enables that flag for a > > variety of boards to make their respective NAND drivers more > > easily convert to Kconfig > > > > Signed-off-by: Adam Ford <aford...@gmail.com> > > Tom, > > Any feedback on this conversion series?
Yes, sorry. I got part-way through fixing up the various PowerPC
platforms that blew up due to how they used CONFIG_NAND for env stuff
and doing:
commit ff8ef1b74f206186d80f343f567b795de789af60
Author: Adam Ford <aford...@gmail.com>
Date: Sat Mar 9 18:02:52 2019 -0600
Convert CONFIG_NAND_FSL_ELBC et al to Kconfig
This converts the following to Kconfig:
CONFIG_NAND_FSL_ELBC
CONFIG_NAND_FSL_IFC
CONFIG_NAND_FSL_UPM
CONFIG_NAND_LPC32XX_MLC
CONFIG_NAND_FSMC
CONFIG_NAND_KB9202
CONFIG_NAND_KIRKWOOD
CONFIG_NAND_KMETER1
CONFIG_NAND_SPEAR
CONFIG_TEGRA_NAND
Signed-off-by: Adam Ford <aford...@gmail.com>
[trini: Rework some logic in p1_p2_rdb_pc.h due to how it used
CONFIG_NAND. Update corenet_ds.h to key ENV defines off of what
ENV location is selected, not other options.]
Signed-off-by: Tom Rini <tr...@konsulko.com>
Signed-off-by: Tom Rini <tr...@konsulko.com>
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index f974291eac1f..0a8aa87f1577 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -59,19 +59,19 @@
#define CONFIG_ENV_OVERWRITE
-#if defined(CONFIG_SPIFLASH)
+#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
-#elif defined(CONFIG_SDCARD)
+#elif defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_OFFSET (512 * 1658)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
+#elif defined(CONFIG_ENV_IS_IN_REMOTE)
#define CONFIG_ENV_ADDR 0xffe20000
#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_ENV_IS_NOWHERE)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 8fa91fb81d31..d887a548feb2 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -29,7 +29,6 @@
#if defined(CONFIG_TARGET_P1020RDB_PC)
#define CONFIG_BOARDNAME "P1020RDB-PC"
-#define CONFIG_NAND_FSL_ELBC
#define CONFIG_VSC7385_ENET
#define CONFIG_SLIC
#define __SW_BOOT_MASK 0x03
@@ -56,7 +55,6 @@
*/
#if defined(CONFIG_TARGET_P1020RDB_PD)
#define CONFIG_BOARDNAME "P1020RDB-PD"
-#define CONFIG_NAND_FSL_ELBC
#define CONFIG_VSC7385_ENET
#define CONFIG_SLIC
#define __SW_BOOT_MASK 0x03
@@ -73,7 +71,6 @@
#if defined(CONFIG_TARGET_P1021RDB)
#define CONFIG_BOARDNAME "P1021RDB-PC"
-#define CONFIG_NAND_FSL_ELBC
#define CONFIG_QE
#define CONFIG_VSC7385_ENET
#define CONFIG_SYS_LBC_LBCR 0x00080000 /* Implement conversion of
@@ -92,7 +89,6 @@
#if defined(CONFIG_TARGET_P1024RDB)
#define CONFIG_BOARDNAME "P1024RDB"
-#define CONFIG_NAND_FSL_ELBC
#define CONFIG_SLIC
#define __SW_BOOT_MASK 0xf3
#define __SW_BOOT_NOR 0x00
@@ -104,7 +100,6 @@
#if defined(CONFIG_TARGET_P1025RDB)
#define CONFIG_BOARDNAME "P1025RDB"
-#define CONFIG_NAND_FSL_ELBC
#define CONFIG_QE
#define CONFIG_SLIC
@@ -120,7 +115,6 @@
#if defined(CONFIG_TARGET_P2020RDB)
#define CONFIG_BOARDNAME "P2020RDB-PC"
-#define CONFIG_NAND_FSL_ELBC
#define CONFIG_VSC7385_ENET
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0xc8
@@ -171,7 +165,7 @@
#endif
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_SPL_NAND_SUPPORT
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
@@ -456,7 +450,7 @@
OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
OR_GPCM_EAD)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
@@ -512,7 +506,7 @@
#else
#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
#endif
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_SPL_NAND_SUPPORT)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
@@ -707,7 +701,7 @@
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_SPL_NAND_SUPPORT)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
But I didn't complete fixing all of the platforms and haven't had a
chance to cycle back to it yet, sorry.
--
Tom
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