Skip secure related initialization in arch_cpu_init if low level
init is skipped. Because these should be done in early stage
firmware, such as ARM trusted firmware.
Signed-off-by: Jun Nie <jun....@linaro.org>
---
arch/arm/mach-imx/mx7/soc.c | 43 ++++++++++++++++++++++++++++---------------
1 file changed, 28 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 7cfdff0..ccfab82 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -164,15 +164,6 @@ u32 __weak get_board_rev(void)
}
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-/* enable all periherial can be accessed in nosec mode */
-static void init_csu(void)
-{
- int i = 0;
- for (i = 0; i < CSU_NUM_REGS; i++)
- writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
-}
-
static void imx_enet_mdio_fixup(void)
{
struct iomuxc_gpr_base_regs *gpr_regs =
@@ -191,6 +182,26 @@ static void imx_enet_mdio_fixup(void)
}
}
+static void init_cpu_basic(void)
+{
+ imx_enet_mdio_fixup();
+
+#ifdef CONFIG_APBH_DMA
+ /* Start APBH DMA */
+ mxs_dma_init();
+#endif
+}
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+/* enable all periherial can be accessed in nosec mode */
+static void init_csu(void)
+{
+ int i = 0;
+
+ for (i = 0; i < CSU_NUM_REGS; i++)
+ writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
+}
+
static void imx_gpcv2_init(void)
{
u32 val, i;
@@ -269,12 +280,7 @@ int arch_cpu_init(void)
/* Disable PDE bit of WMCR register */
imx_wdog_disable_powerdown();
- imx_enet_mdio_fixup();
-
-#ifdef CONFIG_APBH_DMA
- /* Start APBH DMA */
- mxs_dma_init();
-#endif
+ init_cpu_basic();
#if CONFIG_IS_ENABLED(IMX_RDC)
isolate_resource();
@@ -286,6 +292,13 @@ int arch_cpu_init(void)
return 0;
}
+#else
+int arch_cpu_init(void)
+{
+ init_cpu_basic();
+
+ return 0;
+}
#endif
#ifdef CONFIG_ARCH_MISC_INIT
--
2.7.4
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