Hi
On Mon, Mar 25, 2019 at 5:37 PM Fabio Estevam <feste...@gmail.com> wrote:
>
> Hi Michael,
>
> On Mon, Mar 25, 2019 at 1:29 PM Michael Nazzareno Trimarchi
> <mich...@amarulasolutions.com> wrote:
>
> > Can you use ddr calibration instead of fixed value? Does this happen before
> > migration to DT
>
> Yes, this happens before migration to DM.
>
> I am not sure how I can use DDR calibration instead of fixed value.
> Would you have some example?
diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c
index 3779c5d3bd..cdf3b25850 100644
--- a/board/engicam/common/spl.c
+++ b/board/engicam/common/spl.c
@@ -22,6 +22,8 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/video.h>
+#include <asm/arch/mx6-ddr.h>
+
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
@@ -402,6 +404,11 @@ static void spl_dram_init(void)
#elif CONFIG_MX6UL || CONFIG_MX6ULL
mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
+
+ /* Perform DDR DRAM calibration */
+ udelay(100);
+ mmdc_do_write_level_calibration(&ddr_sysinfo);
+ mmdc_do_dqs_calibration(&ddr_sysinfo);
#endif
udelay(100);
diff --git a/configs/imx6ull_isiot_nand_defconfig
b/configs/imx6ull_isiot_nand_defconfig
index 815e41576c..d749e3c58c 100644
--- a/configs/imx6ull_isiot_nand_defconfig
+++ b/configs/imx6ull_isiot_nand_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
+CONFIG_MX6_DDRCAL=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
