Instead of fixing the SPL heap to 64 KiB in the board config header via
CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN
in the defconfig.
This also has the advantage that it removes sub-mach specific ifdefs in
socfpga_common.h.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
---
Changes in v2:
- fixed summary ("stack" -> "heap")
- enable CONFIG_SPL_CLEAR_BSS_F for socfpga_arria10 using full malloc
early in SPL
configs/socfpga_arria10_defconfig | 2 ++
include/configs/socfpga_common.h | 14 --------------
2 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig
b/configs/socfpga_arria10_defconfig
index f321a0ac3b..094232e847 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_TEXT_BASE=0x01000040
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
CONFIG_SPL=y
CONFIG_IDENT_STRING="socfpga_arria10"
@@ -13,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOUNCE_BUFFER=y
+CONFIG_SPL_CLEAR_BSS_F=y
CONFIG_SPL_FPGA_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_ASKENV=y
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 191204b27b..b33a228b5e 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -253,16 +253,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
#endif
-#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
-/* SPL memory allocation configuration, this is for FAT implementation */
-#ifndef CONFIG_SYS_SPL_MALLOC_START
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \
- CONFIG_SYS_SPL_MALLOC_SIZE + \
- CONFIG_SYS_INIT_RAM_ADDR)
-#endif
-#endif
-
/* SPL SDMMC boot support */
#ifdef CONFIG_SPL_MMC_SUPPORT
#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
@@ -296,11 +286,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/*
* Stack setup
*/
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
-#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
-#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START
-#endif
/* Extra Environment */
#ifndef CONFIG_SPL_BUILD
--
2.17.1
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