On Tue, Apr 27, 2010 at 10:44:23AM +0200, Faustino Frechilla wrote: > 79 /* Dual Port RAM addresses. The first 16K is available for almost > 80 * any CPM use, so we put the BDs there. The first 128 bytes are > 81 * used for SMC1 and SMC2 parameter RAM, so we start allocating > 82 * BDs above that. All of this must change when we start > 83 * downloading RAM microcode. > 84 */ > 85 #define CPM_DATAONLY_BASE ((uint)128) > 86 #define CPM_DP_NOSPACE ((uint)0x7fffffff) > 87 #ifndef CONFIG_MPC8272_FAMILY > 88 #define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) > 89 #define CPM_FCC_SPECIAL_BASE ((uint)0x0000b000) > 90 #else /* 8247/48/71/72 */ > 91 #define CPM_DATAONLY_SIZE ((uint)(4 * 1024) - CPM_DATAONLY_BASE) > 92 #define CPM_FCC_SPECIAL_BASE ((uint)0x00009000) > 93 #endif /* !CONFIG_MPC8272_FAMILY */ > > I needed to allocate exactly 4*1024 bytes but, as it is decribed in > that file, the maximum allowed memory is (4*1024) - 128 for > MPC8272_FAMILY processors
Looks like it should have been s/1024/2048/ in both cases (8 contiguous 2K banks on 8260, 4 contiguous 2K banks on 8272). -Scott _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
