This patch is necessary to initialize some board/soc specific clocks -
like anatop, which is used to clock PHY and FEC block itself.
The initialization is performed with device tree by introducing two new
properties - namely;
'fsl,enet-loopback-clk' and 'fsl,enet-freq' which specify the need to
select proper enet clock and the clock value itself.
Previously this setup was done in the board_etc_init() function, which
has been removed after switching to DM/DTS.
Signed-off-by: Lukasz Majewski <lu...@denx.de>
---
drivers/net/fec_mxc.c | 25 +++++++++++++++++++++++++
drivers/net/fec_mxc.h | 2 ++
2 files changed, 27 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 99c5c649a0..728d6c9456 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1297,6 +1297,23 @@ static void fec_gpio_reset(struct fec_priv *priv)
}
}
#endif
+/*
+ * This function is mostly intended for some soc/board specific
+ * clock initialization (like anatop clock on iMX6) done
+ * previously in board_eth_init()
+ */
+__weak int set_fec_clock(int fec_id, enum enet_freq freq);
+
+static int fec_clk_init(struct udevice *dev)
+{
+ struct fec_priv *priv = dev_get_priv(dev);
+ int ret = 0;
+
+ if (priv->enet_loopback_clk)
+ ret = set_fec_clock(dev->seq, priv->freq);
+
+ return ret;
+}
static int fecmxc_probe(struct udevice *dev)
{
@@ -1321,6 +1338,10 @@ static int fecmxc_probe(struct udevice *dev)
priv->clk_rate = clk_get_rate(&priv->ipg_clk);
}
+ ret = fec_clk_init(dev);
+ if (ret)
+ return ret;
+
ret = fec_alloc_descs(priv);
if (ret)
return ret;
@@ -1455,6 +1476,10 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev)
}
#endif
+ priv->enet_loopback_clk = dev_read_bool(dev, "fsl,enet-loopback-clk");
+ if (priv->enet_loopback_clk)
+ dev_read_u32(dev, "fsl,enet-freq", &priv->freq);
+
return 0;
}
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index e9a661f0a1..666b34304c 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -261,6 +261,8 @@ struct fec_priv {
#endif
#ifdef CONFIG_DM_ETH
u32 interface;
+ bool enet_loopback_clk; /* anatop reference clk via PAD loopback */
+ enum enet_freq freq;
#endif
struct clk ipg_clk;
u32 clk_rate;
--
2.11.0
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