On Thu, Nov 1, 2018 at 2:22 AM Marek Vasut <marek.va...@gmail.com> wrote: > > The TMIO core has a quirk where divider == 1 must not be set in DDR modes. > Handle this by setting divider to 2, as suggested in the documentation. > > Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com> > Cc: Masahiro Yamada <yamada.masah...@socionext.com> > --- > drivers/mmc/tmio-common.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c > index 9eb2984ed3..072171d4b3 100644 > --- a/drivers/mmc/tmio-common.c > +++ b/drivers/mmc/tmio-common.c > @@ -565,6 +565,10 @@ static void tmio_sd_set_clk_rate(struct tmio_sd_priv > *priv, > > divisor = DIV_ROUND_UP(mclk, mmc->clock); > > + /* Do not set divider to 0xff in DDR mode */ > + if (mmc->ddr_mode && (divisor == 1)) > + divisor = 2; > +
With this patch applied, my board would not boot any more. Please stop adding Renesas-specific quirks to tmio-common. By moving tmio_sd_set_clk_rate to a platform hook, you can do anything you want to do in renesas-sdhi.c > if (divisor <= 1) > val = (priv->caps & TMIO_SD_CAP_RCAR) ? > TMIO_SD_CLKCTL_RCAR_DIV1 : TMIO_SD_CLKCTL_DIV1; > -- > 2.18.0 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot -- Best Regards Masahiro Yamada _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
