[U-Boot] [PATCH 6/9] ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3

[Marek Vasut]

From: Hiroyuki Yokoyama <hiroyuki.yokoyama...@renesas.com>

Tidy up unused definition related to power control of 3DG.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama...@renesas.com>
---
 board/renesas/draak/draak.c           | 6 ------
 board/renesas/salvator-x/salvator-x.c | 6 ------
 board/renesas/ulcb/ulcb.c             | 6 ------
 3 files changed, 18 deletions(-)

diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 71fd5001c4..060343dfe4 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -44,12 +44,6 @@ int board_early_init_f(void)
        return 0;
 }
 
-/* SYSC */
-/* R/- 32 Power status register 2(3DG) */
-#define        SYSC_PWRSR2     0xE6180100
-/* -/W 32 Power resume control register 2 (3DG) */
-#define        SYSC_PWRONCR2   0xE618010C
-
 /* HSUSB block registers */
 #define HSUSB_REG_LPSTS                        0xE6590102
 #define HSUSB_REG_LPSTS_SUSPM_NORMAL   BIT(14)
diff --git a/board/renesas/salvator-x/salvator-x.c 
b/board/renesas/salvator-x/salvator-x.c
index 726a236af3..a1a1531663 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -44,12 +44,6 @@ int board_early_init_f(void)
        return 0;
 }
 
-/* SYSC */
-/* R/- 32 Power status register 2(3DG) */
-#define        SYSC_PWRSR2     0xE6180100
-/* -/W 32 Power resume control register 2 (3DG) */
-#define        SYSC_PWRONCR2   0xE618010C
-
 /* HSUSB block registers */
 #define HSUSB_REG_LPSTS                        0xE6590102
 #define HSUSB_REG_LPSTS_SUSPM_NORMAL   BIT(14)
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index a7ca274f34..e549a2efac 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -44,12 +44,6 @@ int board_early_init_f(void)
        return 0;
 }
 
-/* SYSC */
-/* R/- 32 Power status register 2(3DG) */
-#define        SYSC_PWRSR2     0xE6180100
-/* -/W 32 Power resume control register 2 (3DG) */
-#define        SYSC_PWRONCR2   0xE618010C
-
 /* HSUSB block registers */
 #define HSUSB_REG_LPSTS                        0xE6590102
 #define HSUSB_REG_LPSTS_SUSPM_NORMAL   BIT(14)
-- 
2.18.0

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