Hi Jagan,

On Thu, 2018-10-04 at 21:31 +0530, Jagan Teki wrote:
> On Tue, Oct 2, 2018 at 4:38 PM Ryder Lee <ryder....@mediatek.com> wrote:
> >
> > From: Guochun Mao <guochun....@mediatek.com>
> >
> > This patch adds MT7629 qspi driver for accessing SPI NOR flash.
> >
> > Cc: Jagan Teki <ja...@openedev.com>
> > Signed-off-by: Guochun Mao <guochun....@mediatek.com>
> > ---
> >  drivers/spi/Kconfig    |   7 +
> >  drivers/spi/Makefile   |   1 +
> >  drivers/spi/mtk_qspi.c | 406 
> > +++++++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 414 insertions(+)
> >  create mode 100644 drivers/spi/mtk_qspi.c
> >
> > +
> > +/* NOR flash commands */
> > +#define MTK_QSPI_OP_WREN           0x6
> > +#define MTK_QSPI_OP_READ_QUAD      0x6B
> > +#define MTK_QSPI_OP_READ_DUAL      0x3B
> > +#define MTK_QSPI_OP_FAST_READ      0xB
> > +#define MTK_QSPI_OP_READ           0x3
> > +#define MTK_QSPI_OP_PP             0x2
> 
> NAK, we don't allow flash commands in spi. Better handle via spi-mem
> or flash side.

I saw fsl_qspi.c also use flash commands to distinguish operations for
different setting. 

Due to controller IP's design, Flash register access is different from
data access for our controller IP, it has to set specific controller's
registers for specific operation.
It seems that spi-mem will not handle this issue, it's specific
controller's business.

About read flash register and read data,
Could you give some suggestions about how to distinguish these two kinds
of ops?
so that we can do properly setting for controller.

Could we implement this driver without considering 0x65/0x71 flash
command those that will have address parameters?
And it seems that, Uboot will not use quad read or dual read?

BR,

Guochun

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