Hi Simon,
On Fri, 14 Sep 2018 at 08:00, Simon Shields <si...@lineageos.org> wrote:
>
> Hi Anand,
>
> On Thu, Sep 13, 2018 at 08:39:52PM +0530, Anand Moon wrote:
> > Hi Simon,
> >
> > On Wed, 12 Sep 2018 at 17:25, Simon Shields <si...@lineageos.org> wrote:
> > >
> > > Hi,
> > >
> > > This patch series adds support for using U-Boot's SPL as the second
> > > stage bootloader ("BL2") on Exynos4412 SoCs.
> > >
> > > - Patch #1 adds support for the EMMC/SD OM pin configuration, which is
> > > used
> > > by the boards I tested on.
> > > - Patch #2 configures the magic values used to indicate system suspend
> > > state (which are identical to exynos5).
> > > - Patch #3 renames the existing exynos4 clock/dmc initialisation code
> > > to reflect the fact that it only supports exynos4210.
> > > - Patches #4 and #5 add/fill in structs reflecting the PMU and TZASC
> > > register layouts on exynos4412, respectively.
> > > - Patch #6 adds the exynos4412 DMC and clock initialisation code and
> > > enables building the SPL on exynos4412 platforms.
> > > - Patch #7 enables building the "mkexynosspl" utility for exynos4 SoCs.
> > >
> > > The majority of the logic in patch #6 comes from a vendor u-boot dump
> > > (2010.12!), however, small portions (mostly code used for 2GB RAM
> > > initialisation) were reverse engineered from the vendor
> > > bootloader found on a GT-N7100.
> > >
> > > This patch series has been tested on a GT-I9300 (exynos4412, 1GB RAM)
> > > and a GT-N7100 (exynos4412 prime, 2GB RAM), with a few additional
> > > patchsets applied for board/HW support (which I intend to upstream in
> > > the future).
> > >
> > > Cheers,
> > > Simon
> > >
> >
> > Could you elaborate more on how to generate stage bootloader (BL2) image,
> > I am not aware of such process and what are next step to create SPL
> > for Exynos platform.
> >
> > I have build these patches for Odroid-U3 boards, with no SPL enable.
>
> Of course!
>
> You need to add "select SUPPORT_SPL" to the relevant TARGET_ kconfig
> entry (e.g. [0]). Then, you need to configure the SPL suitably in
> include/configs/<target>.h - see [1], these values should not need
> changing between boards. Finally, you need to enable some SPL
> stuff in the defconfig (see [2]). That should allow u-boot to generate
> a SPL binary, which should go in spl/<target>-spl.bin.
>
> After that, you need to assemble an image suitable for flashing to an
> sdcard/eMMC. I use these two scripts [3], [4] combined with this BL1 [5]
> (originally from the ODROID-X u-boot sources, which no longer appear
> to be available) for eMMC and sdcard respectively.
>
> The usage of the script is:
>
> ./create_4412_<sd|emmc>_image.sh <bl1 binary> <spl binary> <u-boot.bin>
> <outfile>
>
> <outfile> can then be dd'd directly to an SD card or to the eMMC boot0
> partition.
>
> Hope that gets things working for you!
>
> Cheers,
> Simon
>
> >
> > Best Regards
> > -Anand
>
> [0]:
> https://github.com/fourkbomb/u-boot/blob/4be16a7/arch/arm/mach-exynos/Kconfig#L77
> [1]:
> https://github.com/fourkbomb/u-boot/blob/4be16a7/include/configs/midas.h#L31-L53
> [2]:
> https://github.com/fourkbomb/u-boot/blob/4be16a7/configs/midas_defconfig#L6-L10
> [3]:
> https://github.com/fourkbomb/buildroot-external-midas/blob/master/board/midas/create_4412_emmc_image.sh
> [4]:
> https://github.com/fourkbomb/buildroot-external-midas/blob/master/board/midas/create_4412_sd_image.sh
> [5]:
> https://github.com/fourkbomb/buildroot-external-midas/blob/master/board/midas/p4412_s_fwbl1.bin
Thank you very much for this inside on building SPL image. I will give
this a try on Odroid U3.
Do you have plan to add some low-level code to control clk memory cpu.
[0]
https://github.com/SamsungARTIK/u-boot-artik/tree/artik-exynos/v2012.07/board/samsung/smdk4x12
Actually I failed to understand how the communication between the
kernel binary and u-boot with out this code.
Also what about trusted zone, and do we need to get this spl image
signed by Samsung/Hardkernel to make this work.
Best Regards
-Anand
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