于 2018年6月27日 GMT+08:00 下午10:04:53, Andre Przywara <andre.przyw...@arm.com> 写到:
>Hi,
>
>On 25/06/18 11:37, Icenowy Zheng wrote:
>> Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe
>> interfaces.
>>
>> This patch adds support for it.
>
>Can you please mention in the commit message or subject line that this
>includes the SoC .dtsi? Or maybe even split this out into a separate
>patch?
>
>And is there any reason you didn't copy the official Linux DT version?
>Or is that one here just an older copy of that?
>Anyway, please use the most recent version of the .dtsi, so we can use
>that directly to pass on to the kernel.
Okay.
P.S. it's "oldest", not "older".
>
>Thanks!
>Andre.
>
>> As this is a new SoC supported by mainline U-Boot, the MMC env
>support
>> is dropped and only FAT env is available.
>>
>> Signed-off-by: Icenowy Zheng <icen...@aosc.io>
>> ---
>> arch/arm/dts/sun50i-h6.dtsi | 140
>+++++++++++++++++++++++++++++++++
>> arch/arm/mach-sunxi/Kconfig | 17 +++-
>> arch/arm/mach-sunxi/cpu_info.c | 2 +
>> common/spl/Kconfig | 2 +-
>> 4 files changed, 159 insertions(+), 2 deletions(-)
>> create mode 100644 arch/arm/dts/sun50i-h6.dtsi
>>
>> diff --git a/arch/arm/dts/sun50i-h6.dtsi
>b/arch/arm/dts/sun50i-h6.dtsi
>> new file mode 100644
>> index 0000000000..50f9146318
>> --- /dev/null
>> +++ b/arch/arm/dts/sun50i-h6.dtsi
>> @@ -0,0 +1,140 @@
>> +/*
>> + * Copyright (C) 2017 Icenowy Zheng <icen...@aosc.io>
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this
>dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>as
>> + * published by the Free Software Foundation; either version 2
>of the
>> + * License, or (at your option) any later version.
>> + *
>> + * This file is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty
>of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively,
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated
>documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use,
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom
>the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall
>be
>> + * included in all copies or substantial portions of the
>Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
>KIND,
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
>WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +/ {
>> + interrupt-parent = <&gic>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + cpu0: cpu@0 {
>> + compatible = "arm,cortex-a53", "arm,armv8";
>> + device_type = "cpu";
>> + reg = <0>;
>> + };
>> +
>> + cpu1: cpu@1 {
>> + compatible = "arm,cortex-a53", "arm,armv8";
>> + device_type = "cpu";
>> + reg = <1>;
>> + };
>> +
>> + cpu2: cpu@2 {
>> + compatible = "arm,cortex-a53", "arm,armv8";
>> + device_type = "cpu";
>> + reg = <2>;
>> + };
>> +
>> + cpu3: cpu@3 {
>> + compatible = "arm,cortex-a53", "arm,armv8";
>> + device_type = "cpu";
>> + reg = <3>;
>> + };
>> + };
>> +
>> + osc24M: osc24M_clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + clock-frequency = <24000000>;
>> + clock-output-names = "osc24M";
>> + };
>> +
>> + osc32k: osc32k_clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + clock-frequency = <32768>;
>> + clock-output-names = "osc32k";
>> + };
>> +
>> + iosc: internal-osc-clk {
>> + #clock-cells = <0>;
>> + compatible = "fixed-clock";
>> + clock-frequency = <16000000>;
>> + clock-accuracy = <300000000>;
>> + clock-output-names = "iosc";
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupts = <GIC_PPI 13
>> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
>> + <GIC_PPI 14
>> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
>> + <GIC_PPI 11
>> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
>> + <GIC_PPI 10
>> + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> + };
>> +
>> + soc {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + gic: interrupt-controller@3021000 {
>> + compatible = "arm,gic-400";
>> + reg = <0x03021000 0x1000>,
>> + <0x03022000 0x2000>,
>> + <0x03024000 0x2000>,
>> + <0x03026000 0x2000>;
>> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
>IRQ_TYPE_LEVEL_HIGH)>;
>> + interrupt-controller;
>> + #interrupt-cells = <3>;
>> + };
>> +
>> + uart0: serial@5000000 {
>> + compatible = "snps,dw-apb-uart";
>> + reg = <0x05000000 0x400>;
>> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
>> + reg-shift = <2>;
>> + reg-io-width = <4>;
>> + clocks = <&osc24M>; /* placeholder */
>> + status = "disabled";
>> + };
>> + };
>> +};
>> diff --git a/arch/arm/mach-sunxi/Kconfig
>b/arch/arm/mach-sunxi/Kconfig
>> index c2fa0533e7..cb4a9af6bf 100644
>> --- a/arch/arm/mach-sunxi/Kconfig
>> +++ b/arch/arm/mach-sunxi/Kconfig
>> @@ -82,6 +82,7 @@ config SUN8I_RSB
>> config SUNXI_SRAM_ADDRESS
>> hex
>> default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
>> + default 0x20000 if MACH_SUN50I_H6
>> default 0x0
>> ---help---
>> Older Allwinner SoCs have their mask boot ROM mapped just below
>4GB,
>> @@ -281,6 +282,14 @@ config MACH_SUN50I_H5
>> select FIT
>> select SPL_LOAD_FIT
>>
>> +config MACH_SUN50I_H6
>> + bool "sun50i (Allwinner H6)"
>> + select ARM64
>> + select SUPPORT_SPL
>> + select FIT
>> + select SPL_LOAD_FIT
>> + select DRAM_SUN50I_H6
>> +
>> endchoice
>>
>> # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23
>|| A33"
>> @@ -374,6 +383,7 @@ config DRAM_CLK
>> default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || \
>> MACH_SUN8I_V3S
>> default 672 if MACH_SUN50I
>> + default 744 if MACH_SUN50I_H6
>> ---help---
>> Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
>> must be a multiple of 24. For the sun9i (A80), the tested values
>> @@ -393,7 +403,7 @@ config DRAM_ZQ
>> default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
>> default 127 if MACH_SUN7I
>> default 14779 if MACH_SUN8I_V3S
>> - default 3881979 if MACH_SUN8I_R40
>> + default 3881979 if MACH_SUN8I_R40 || MACH_SUN50I_H6
>> default 4145117 if MACH_SUN9I
>> default 3881915 if MACH_SUN50I
>> ---help---
>> @@ -405,6 +415,7 @@ config DRAM_ODT_EN
>> default y if MACH_SUN8I_A23
>> default y if MACH_SUN8I_R40
>> default y if MACH_SUN50I
>> + default y if MACH_SUN50I_H6
>> ---help---
>> Select this to enable dram odt (on die termination).
>>
>> @@ -495,6 +506,7 @@ config SYS_CLK_FREQ
>> default 816000000 if MACH_SUN50I || MACH_SUN50I_H5
>> default 1008000000 if MACH_SUN8I
>> default 1008000000 if MACH_SUN9I
>> + default 888000000 if MACH_SUN50I_H6
>>
>> config SYS_CONFIG_NAME
>> default "sun4i" if MACH_SUN4I
>> @@ -504,6 +516,7 @@ config SYS_CONFIG_NAME
>> default "sun8i" if MACH_SUN8I
>> default "sun9i" if MACH_SUN9I
>> default "sun50i" if MACH_SUN50I
>> + default "sun50i" if MACH_SUN50I_H6
>>
>> config SYS_BOARD
>> default "sunxi"
>> @@ -709,6 +722,7 @@ config VIDEO_SUNXI
>> depends on !MACH_SUN8I_V3S
>> depends on !MACH_SUN9I
>> depends on !MACH_SUN50I
>> + depends on !MACH_SUN50I_H6
>> select VIDEO
>> imply VIDEO_DT_SIMPLEFB
>> default y
>> @@ -941,6 +955,7 @@ config SPL_STACK_R_ADDR
>> default 0x4fe00000 if MACH_SUN8I
>> default 0x2fe00000 if MACH_SUN9I
>> default 0x4fe00000 if MACH_SUN50I
>> + default 0x4fe00000 if MACH_SUN50I_H6
>>
>> config SPL_SPI_SUNXI
>> bool "Support for SPI Flash on Allwinner SoCs in SPL"
>> diff --git a/arch/arm/mach-sunxi/cpu_info.c
>b/arch/arm/mach-sunxi/cpu_info.c
>> index 25a5ec26a0..90aff395dc 100644
>> --- a/arch/arm/mach-sunxi/cpu_info.c
>> +++ b/arch/arm/mach-sunxi/cpu_info.c
>> @@ -97,6 +97,8 @@ int print_cpuinfo(void)
>> puts("CPU: Allwinner A64 (SUN50I)\n");
>> #elif defined CONFIG_MACH_SUN50I_H5
>> puts("CPU: Allwinner H5 (SUN50I)\n");
>> +#elif defined CONFIG_MACH_SUN50I_H6
>> + puts("CPU: Allwinner H6 (SUN50I)\n");
>> #else
>> #warning Please update cpu_info.c with correct CPU information
>> puts("CPU: SUNXI Family\n");
>> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
>> index 4d27565566..e761bda6f1 100644
>> --- a/common/spl/Kconfig
>> +++ b/common/spl/Kconfig
>> @@ -246,7 +246,7 @@ config SPL_SHA256_SUPPORT
>> config SPL_FIT_IMAGE_TINY
>> bool "Remove functionality from SPL FIT loading to reduce size"
>> depends on SPL_FIT
>> - default y if MACH_SUN50I || MACH_SUN50I_H5
>> + default y if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
>> help
>> Enable this to reduce the size of the FIT image loading code
>> in SPL, if space for the SPL binary is very tight.
>>
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