On Mon, Jun 11, 2018 at 10:54 PM, Simon Glass <s...@chromium.org> wrote: > On 10 June 2018 at 05:25, Bin Meng <bmeng...@gmail.com> wrote: >> From: Christian Gmeiner <christian.gmei...@gmail.com> >> >> If U-Boot gets used as coreboot payload all pci resources got >> assigned by coreboot. If a dts without any pci ranges gets used >> the dm is not able to access pci device memory. To get things >> working make use of a 1:1 mapping for bus <-> phy addresses. >> >> This change makes it possible to get the e1000 U-Boot driver >> working on a sandybridge device where U-Boot is used as coreboot >> payload. >> >> Signed-off-by: Christian Gmeiner <christian.gmei...@gmail.com> >> Reviewed-by: Bin Meng <bmeng...@gmail.com> >> [bmeng: fixed 'u-boot' in the commit message] >> Signed-off-by: Bin Meng <bmeng...@gmail.com> >> >> --- >> >> drivers/pci/pci-uclass.c | 10 ++++++++++ >> 1 file changed, 10 insertions(+) > > Reviewed-by: Simon Glass <s...@chromium.org>
applied to u-boot-x86, thanks! _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
