Declare the SPI NAND device accessible on the SPI bus with CS1.

Signed-off-by: Miquel Raynal <miquel.ray...@bootlin.com>
---
 arch/mips/dts/mscc,ocelot_pcb.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/mips/dts/mscc,ocelot_pcb.dtsi 
b/arch/mips/dts/mscc,ocelot_pcb.dtsi
index 4e532363c3..2f37ef92f9 100644
--- a/arch/mips/dts/mscc,ocelot_pcb.dtsi
+++ b/arch/mips/dts/mscc,ocelot_pcb.dtsi
@@ -25,11 +25,20 @@
 
 &spi0 {
        status = "okay";
+       pinctrl-0 = <&spi_cs1_pin>;
+       pinctrl-names = "default";
+
        spi-flash@0 {
                compatible = "spi-flash";
                 spi-max-frequency = <18000000>; /* input clock */
                 reg = <0>; /* CS0 */
        };
+
+       spi-nand@1 {
+               compatible = "spi-nand";
+               spi-max-frequency = <18000000>; /* input clock */
+               reg = <1>; /* CS1 */
+       };
 };
 
 &ethernet {
-- 
2.14.1

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