Dear Stefano Babic, In message <1263212760-27272-4-git-send-email-sba...@denx.de> you wrote: > The patch add header files to support the Freescale i.MX51 > processor, setting definitions for internal registers. ... > +/* Define the bits in register CBCDR */ > +#define MXC_CCM_CBCDR_EMI_CLK_SEL (0x1 << 26) > +#define MXC_CCM_CBCDR_PERIPH_CLK_SEL (0x1 << 25) > +#define MXC_CCM_CBCDR_EMI_PODF_OFFSET (22)
Please remove the prens around plain numbers like here... > +#define MXC_CCM_CBCDR_EMI_PODF_MASK (0x7 << 22) > +#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET (19) ... and here ... and everywhere else. ... > +/* WEIM registers */ > +#define CSGCR1 0x00 > +#define CSGCR2 0x04 > +#define CSRCR1 0x08 > +#define CSRCR2 0x0C > +#define CSWCR1 0x10 This looks like something that should be converted into a C struct. > +/* ESDCTL */ > +#define ESDCTL_ESDCTL0 0x00 > +#define ESDCTL_ESDCFG0 0x04 > +#define ESDCTL_ESDCTL1 0x08 > +#define ESDCTL_ESDCFG1 0x0C > +#define ESDCTL_ESDMISC 0x10 > +#define ESDCTL_ESDSCR 0x14 > +#define ESDCTL_ESDCDLY1 0x20 > +#define ESDCTL_ESDCDLY2 0x24 > +#define ESDCTL_ESDCDLY3 0x28 > +#define ESDCTL_ESDCDLY4 0x2C > +#define ESDCTL_ESDCDLY5 0x30 > +#define ESDCTL_ESDCDLYGD 0x34 Ditto. > +/* CCM */ > +#define CLKCTL_CCR 0x00 > +#define CLKCTL_CCDR 0x04 > +#define CLKCTL_CSR 0x08 > +#define CLKCTL_CCSR 0x0C > +#define CLKCTL_CACRR 0x10 > +#define CLKCTL_CBCDR 0x14 > +#define CLKCTL_CBCMR 0x18 > +#define CLKCTL_CSCMR1 0x1C > +#define CLKCTL_CSCMR2 0x20 > +#define CLKCTL_CSCDR1 0x24 > +#define CLKCTL_CS1CDR 0x28 > +#define CLKCTL_CS2CDR 0x2C > +#define CLKCTL_CDCDR 0x30 > +#define CLKCTL_CHSCCDR 0x34 > +#define CLKCTL_CSCDR2 0x38 > +#define CLKCTL_CSCDR3 0x3C > +#define CLKCTL_CSCDR4 0x40 > +#define CLKCTL_CWDR 0x44 > +#define CLKCTL_CDHIPR 0x48 > +#define CLKCTL_CDCR 0x4C > +#define CLKCTL_CTOR 0x50 > +#define CLKCTL_CLPCR 0x54 > +#define CLKCTL_CISR 0x58 > +#define CLKCTL_CIMR 0x5C > +#define CLKCTL_CCOSR 0x60 > +#define CLKCTL_CGPR 0x64 > +#define CLKCTL_CCGR0 0x68 > +#define CLKCTL_CCGR1 0x6C > +#define CLKCTL_CCGR2 0x70 > +#define CLKCTL_CCGR3 0x74 > +#define CLKCTL_CCGR4 0x78 > +#define CLKCTL_CCGR5 0x7C > +#define CLKCTL_CCGR6 0x80 > +#define CLKCTL_CMEOR 0x84 And again. > +/* DPLL */ > +#define PLL_DP_CTL 0x00 > +#define PLL_DP_CONFIG 0x04 > +#define PLL_DP_OP 0x08 > +#define PLL_DP_MFD 0x0C > +#define PLL_DP_MFN 0x10 > +#define PLL_DP_MFNMINUS 0x14 > +#define PLL_DP_MFNPLUS 0x18 > +#define PLL_DP_HFS_OP 0x1C > +#define PLL_DP_HFS_MFD 0x20 > +#define PLL_DP_HFS_MFN 0x24 > +#define PLL_DP_TOGC 0x28 > +#define PLL_DP_DESTAT 0x2C And again. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Real computer scientists despise the idea of actual hardware. Hard- ware has limitations, software doesn't. It's a real shame that Turing machines are so poor at I/O. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
