PHYCTL register offset at 0x10 need to be cleared before it's
written. Ported from below Linux patch.
d699c1d phy: sun4i-usb: change PHYCTL register clearing code
Signed-off-by: Jun Nie <jun....@linaro.org>
---
arch/arm/mach-sunxi/usb_phy.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index 2f1cad1..1a6b4b4 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -156,8 +156,14 @@ __maybe_unused static void usb_phy_write(struct
sunxi_usb_phy *phy, int addr,
static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
{
#if defined CONFIG_MACH_SUNXI_H3_H5
- if (phy->id == 0)
+ if (phy->id == 0) {
+#if defined(CONFIG_USB_MUSB_HOST)
clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
+#else
+ setbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
+ writel(0, SUNXI_USB0_BASE + SUNXI_USB_CSR);
+#endif
+ }
#endif
clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02);
}
--
1.9.1
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