Hi Peng, 2017-11-29 0:42 GMT-02:00 Peng Fan <van.free...@gmail.com>: > Hi Diego, > > On Tue, Nov 28, 2017 at 02:42:20PM -0200, Diego Dorta wrote: >>Hi Peng Fan, >> >>2017-11-28 10:31 GMT-02:00 Peng Fan <peng....@nxp.com>: >>> This patchset is to add i.MX8M and i.MX8MQ-EVK support >>> >>> patch: "power: pmic.h: include dm/ofnode.h" and >>> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed >>> in mailist to not merged. Pick it up. >>> >>> The board support is a large patch because of the ddr related code. >>> If it is not good, please first review/pick-up other patches if they >>> are ok. >>> >> >>I applied your patches and I am facing the following errors: > > I missed to add this after I cleanup patches. > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > index efa2056e09..5ad17cb7fb 100644 > --- a/arch/arm/mach-imx/Makefile > +++ b/arch/arm/mach-imx/Makefile > @@ -135,3 +135,4 @@ obj-$(CONFIG_MX6) += mx6/ > obj-$(CONFIG_MX7) += mx7/ > obj-$(CONFIG_ARCH_MX7ULP) += mx7ulp/ > > +obj-$(CONFIG_MX8M) += mx8m/ > > I'll add this in V2. > > Thanks, > Peng. >
I've followed the instructions for compiling and generating the flash.bin file image. However, when I try to boot I got this error and the U-Boot does not fully load: � U-Boot SPL 2017.11-38298-g2c1aa10-dirty (Nov 30 2017 - 10:49:38) PMIC: PFUZE100 ID=0x10 check ddr4_pmu_train_imem code check ddr4_pmu_train_imem code pass check ddr4_pmu_train_dmem code check ddr4_pmu_train_dmem code pass PLL bypass to 100MTS setting done Training PASS PLL bypass to 400MTS setting done Training PASS Training PASS check ddr4_pmu_train_imem code check ddr4_pmu_train_imem code pass check ddr4_pmu_train_dmem code check ddr4_pmu_train_dmem code pass Have you ever faced this error or am I doing something wrong? Thanks, Diego _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
