This patch identifies exact cpu in function arch_cpu_init().
It does the following:
- It consolidates all related #defines into omap3.h.
- Prefixes CTRL_ to #defines used in comparison against
contents of Control Status Register returned by the
function get_cpu_type().
- Adds new #defines to identify exact CPU id.
Signed-off-by: Sanjeev Premi <pr...@ti.com>
---
cpu/arm_cortexa8/omap3/sys_info.c | 55 ++++++++++++++++++++++++++++++++++-
include/asm-arm/arch-omap3/cpu.h | 6 ----
include/asm-arm/arch-omap3/omap3.h | 26 +++++++++++++++-
3 files changed, 77 insertions(+), 10 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c
b/cpu/arm_cortexa8/omap3/sys_info.c
index 6206e17..3544d26 100644
--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/cpu/arm_cortexa8/omap3/sys_info.c
@@ -45,14 +45,17 @@ static u16 cpu_family;
static u16 cpu_id;
static u8 cpu_revision;
+static u32 get_cpu_type(void);
+
/**
* Identify the silicon
*
- * Currently, it identifies the cpu family and silicon revision.
+ * It identifies the cpu family, exact cpu and silicon revision.
*/
void identify_cpu (void)
{
u32 cpuid = 0;
+ u32 cputype;
u16 hawkeye;
struct ctrl_id *id_base;
@@ -73,6 +76,9 @@ void identify_cpu (void)
hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
cpu_revision = (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
+ /*
+ * Identify cpu family and revision
+ */
switch (hawkeye) {
case HAWKEYE_OMAP34XX:
cpu_family = CPU_OMAP34XX;
@@ -90,6 +96,51 @@ void identify_cpu (void)
cpu_family = CPU_OMAP34XX;
break;
}
+
+ cputype = get_cpu_type();
+ switch (cpu_family)
+ {
+ case CPU_OMAP34XX:
+ switch (cputype) {
+ case CTRL_OMAP3503:
+ cpu_id = OMAP3503;
+ break;
+ case CTRL_OMAP3515:
+ cpu_id = OMAP3515;
+ break;
+ case CTRL_OMAP3525:
+ cpu_id = OMAP3525;
+ break;
+ case CTRL_OMAP3530:
+ cpu_id = OMAP3430; /* Same as OMAP3530 */
+ break;
+ default:
+ cpu_id = OMAP3430;
+ break;
+ }
+ break;
+
+ case CPU_AM35XX:
+ switch (cputype) {
+ case CTRL_AM3505:
+ cpu_id = AM3505;
+ break;
+ case CTRL_AM3517:
+ cpu_id = AM3517;
+ break;
+ default:
+ cpu_id = AM3505;
+ break;
+ }
+ break;
+
+ default:
+ /*
+ * Fall back to most common device
+ */
+ cpu_id = OMAP3430;
+ break;
+ }
}
}
@@ -150,7 +201,7 @@ void dieid_num_r(void)
/******************************************
* get_cpu_type(void) - extract cpu info
******************************************/
-u32 get_cpu_type(void)
+static u32 get_cpu_type(void)
{
return readl(&ctrl_base->ctrl_omap_stat);
}
diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h
index 8ab2e39..088a342 100644
--- a/include/asm-arm/arch-omap3/cpu.h
+++ b/include/asm-arm/arch-omap3/cpu.h
@@ -60,12 +60,6 @@ struct ctrl {
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL_STRICT_NAMES */
-/* cpu type */
-#define OMAP3503 0x5c00
-#define OMAP3515 0x1c00
-#define OMAP3525 0x4c00
-#define OMAP3530 0x0c00
-
#ifndef __KERNEL_STRICT_NAMES
#ifndef __ASSEMBLY__
struct ctrl_id {
diff --git a/include/asm-arm/arch-omap3/omap3.h
b/include/asm-arm/arch-omap3/omap3.h
index 86df1f2..af23e5d 100644
--- a/include/asm-arm/arch-omap3/omap3.h
+++ b/include/asm-arm/arch-omap3/omap3.h
@@ -161,8 +161,6 @@ struct gpio {
#define DDR_133 133 /* most combo, some mem d-boards */
#define DDR_165 165 /* future parts */
-#define CPU_3430 0x3430
-
/*
* 343x real hardware:
* ES1 = rev 0
@@ -197,4 +195,28 @@ struct gpio {
#define CPU_OMAP34XX 0x3400 /* OMAP34xx/OMAP35 devices */
#define CPU_AM35XX 0x3500 /* AM35xx devices */
+/*
+ * Define CPUs
+ */
+#define OMAP3430 0x3430
+
+#define OMAP3503 0x3503
+#define OMAP3515 0x3515
+#define OMAP3525 0x3525
+#define OMAP3530 0x3530
+
+#define AM3505 0x3505
+#define AM3517 0x3517
+
+/*
+ * Control status register values corresponding to cpu variants
+ */
+#define CTRL_OMAP3503 0x5c00
+#define CTRL_OMAP3515 0x1c00
+#define CTRL_OMAP3525 0x4c00
+#define CTRL_OMAP3530 0x0c00
+
+#define CTRL_AM3505 0x5c00
+#define CTRL_AM3517 0x1c00
+
#endif
--
1.6.2.2
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