Simplify code by removing set_preclk_from_osc with directly setbits_le32.
Signed-off-by: Peng Fan <peng....@nxp.com>
Cc: Stefano Babic <sba...@denx.de>
Cc: Fabio Estevam <fabio.este...@nxp.com>
---
arch/arm/mach-imx/mx6/soc.c | 17 ++---------------
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index b4ec11a..976179e 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -348,18 +348,6 @@ static void init_bandgap(void)
}
}
-#ifdef CONFIG_MX6SL
-static void set_preclk_from_osc(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- u32 reg;
-
- reg = readl(&mxc_ccm->cscmr1);
- reg |= MXC_CCM_CSCMR1_PER_CLK_SEL_MASK;
- writel(reg, &mxc_ccm->cscmr1);
-}
-#endif
-
int arch_cpu_init(void)
{
struct sched_ctrl_regs *regs =
@@ -429,9 +417,8 @@ int arch_cpu_init(void)
}
/* Set perclk to source from OSC 24MHz */
-#if defined(CONFIG_MX6SL)
- set_preclk_from_osc();
-#endif
+ if (is_mx6sl())
+ setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);
imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
--
2.6.2
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
