> On Tue, 2009-11-10 at 08:42 +0800, Liu Dave-R63238 wrote: > > > IIRC, 85xx cache is enabled, so when we do the ecc error inject > > > test, What will happen before disable ecc error inject? > > > I-fetch may get wrong instruction? > > If you're injecting multibit errors, yes, things could break > down, much like a real multibit error.
IIRC, 83xx ECC code will NOT break down when we inject multibit error. The code will go on, u-boot also go on... > > and .... > > Because cache is enabled, data bus assume 64 bits (it is > normal case). > > The DDR bus will have 4-beat burst. So the error > information will be > > the last beat triggered, or multi-bit error at first beat....., or.. > > It is really complex..... > > I believe all 4 beats would have the ecc error injected. > > In my opinion, the error reporting functionality of the ECC > code is much more important than error injection. Other than > testing code during development, when do you inject errors? > ECC detection and reporting is useful day-to-day, in the > field, during manufacturing tests, etc so that's where the > emphasis of this patch is focussed. 83xx ECC code also has good ECC error reporting functionality, IIRC, type ecc status... _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
