83xx ECC test code is really perfect, but it is regretful that it can
not reused to 85xx/86xx right now.
I'm not sure which approach is better between Peter's and this.
Because I still have not read carefully Peter's code.
> Update 83xx boards to use the same ECC driver that the 85xx and 86xx
> boards currently use. The common 83xx/85xx/86xx ECC driver has
> fewer options, but better error reporting.
>
> Signed-off-by: Peter Tyser <pty...@xes-inc.com>
> ---
> cpu/mpc83xx/Makefile | 1 -
> cpu/mpc83xx/ecc.c | 390
> -----------------------------------------
> include/configs/MPC8349EMDS.h | 2 +-
> include/configs/MPC8360EMDS.h | 2 +-
> include/configs/MPC8360ERDK.h | 2 +-
> include/configs/MPC837XEMDS.h | 2 +-
> include/configs/MPC837XERDB.h | 2 +-
> include/configs/sbc8349.h | 2 +-
> include/configs/vme8349.h | 2 +-
> 9 files changed, 7 insertions(+), 398 deletions(-)
> delete mode 100644 cpu/mpc83xx/ecc.c
>
> diff --git a/cpu/mpc83xx/Makefile b/cpu/mpc83xx/Makefile
> index 15e2c18..8fda557 100644
> --- a/cpu/mpc83xx/Makefile
> +++ b/cpu/mpc83xx/Makefile
> @@ -35,7 +35,6 @@ COBJS-y += cpu_init.o
> COBJS-y += speed.o
> COBJS-y += interrupts.o
> COBJS-y += spd_sdram.o
> -COBJS-y += ecc.o
> COBJS-$(CONFIG_QE) += qe_io.o
> COBJS-$(CONFIG_FSL_SERDES) += serdes.o
> COBJS-$(CONFIG_PCI) += pci.o
> diff --git a/cpu/mpc83xx/ecc.c b/cpu/mpc83xx/ecc.c
> deleted file mode 100644
> index f3942b4..0000000
> --- a/cpu/mpc83xx/ecc.c
> +++ /dev/null
> @@ -1,390 +0,0 @@
> -/*
> - * Copyright (C) 2007 Freescale Semiconductor, Inc.
> - *
> - * Dave Liu <dave...@freescale.com>
> - * based on the contribution of Marian Balakowicz <m...@semihalf.com>
> - *
> - * See file CREDITS for list of people who contributed to this
> - * project.
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation; either version 2 of
> - * the License, or (at your option) any later version.
> - */
> -
> -#include <common.h>
> -#include <mpc83xx.h>
> -#include <command.h>
> -
> -#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD)
> -void ecc_print_status(void)
> -{
> - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
> - volatile ddr83xx_t *ddr = &immap->ddr;
> -
> - printf("\nECC mode: %s\n\n",
> - (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");
> -
> - /* Interrupts */
> - printf("Memory Error Interrupt Enable:\n");
> - printf(" Multiple-Bit Error Interrupt Enable: %d\n",
> - (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0);
> - printf(" Single-Bit Error Interrupt Enable: %d\n",
> - (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0);
> - printf(" Memory Select Error Interrupt Enable: %d\n\n",
> - (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0);
> -
> - /* Error disable */
> - printf("Memory Error Disable:\n");
> - printf(" Multiple-Bit Error Disable: %d\n",
> - (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0);
> - printf(" Sinle-Bit Error Disable: %d\n",
> - (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0);
> - printf(" Memory Select Error Disable: %d\n\n",
> - (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);
> -
> - /* Error injection */
> - printf("Memory Data Path Error Injection Mask High/Low:
> %08x %08x\n",
> - ddr->data_err_inject_hi, ddr->data_err_inject_lo);
> -
> - printf("Memory Data Path Error Injection Mask ECC:\n");
> - printf(" ECC Mirror Byte: %d\n",
> - (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0);
> - printf(" ECC Injection Enable: %d\n",
> - (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0);
> - printf(" ECC Error Injection Mask: 0x%02x\n\n",
> - ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM);
> -
> - /* SBE counter/threshold */
> - printf("Memory Single-Bit Error Management (0..255):\n");
> - printf(" Single-Bit Error Threshold: %d\n",
> - (ddr->err_sbe & ECC_ERROR_MAN_SBET) >>
> ECC_ERROR_MAN_SBET_SHIFT);
> - printf(" Single-Bit Error Counter: %d\n\n",
> - (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >>
> ECC_ERROR_MAN_SBEC_SHIFT);
> -
> - /* Error detect */
> - printf("Memory Error Detect:\n");
> - printf(" Multiple Memory Errors: %d\n",
> - (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0);
> - printf(" Multiple-Bit Error: %d\n",
> - (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0);
> - printf(" Single-Bit Error: %d\n",
> - (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0);
> - printf(" Memory Select Error: %d\n\n",
> - (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);
> -
> - /* Capture data */
> - printf("Memory Error Address Capture: 0x%08x\n",
> ddr->capture_address);
> - printf("Memory Data Path Read Capture High/Low: %08x %08x\n",
> - ddr->capture_data_hi, ddr->capture_data_lo);
> - printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",
> - ddr->capture_ecc & CAPTURE_ECC_ECE);
> -
> - printf("Memory Error Attributes Capture:\n");
> - printf(" Data Beat Number: %d\n",
> - (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >>
> - ECC_CAPT_ATTR_BNUM_SHIFT);
> - printf(" Transaction Size: %d\n",
> - (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >>
> - ECC_CAPT_ATTR_TSIZ_SHIFT);
> - printf(" Transaction Source: %d\n",
> - (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >>
> - ECC_CAPT_ATTR_TSRC_SHIFT);
> - printf(" Transaction Type: %d\n",
> - (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >>
> - ECC_CAPT_ATTR_TTYP_SHIFT);
> - printf(" Error Information Valid: %d\n\n",
> - ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
> -}
> -
> -int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
> -{
> - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
> - volatile ddr83xx_t *ddr = &immap->ddr;
> - volatile u32 val;
> - u64 *addr;
> - u32 count;
> - register u64 *i;
> - u32 ret[2];
> - u32 pattern[2];
> - u32 writeback[2];
> -
> - /* The pattern is written into memory to generate error */
> - pattern[0] = 0xfedcba98UL;
> - pattern[1] = 0x76543210UL;
> -
> - /* After injecting error, re-initialize the memory with
> the value */
> - writeback[0] = 0x01234567UL;
> - writeback[1] = 0x89abcdefUL;
> -
> - if (argc > 4) {
> - cmd_usage(cmdtp);
> - return 1;
> - }
> -
> - if (argc == 2) {
> - if (strcmp(argv[1], "status") == 0) {
> - ecc_print_status();
> - return 0;
> - } else if (strcmp(argv[1], "captureclear") == 0) {
> - ddr->capture_address = 0;
> - ddr->capture_data_hi = 0;
> - ddr->capture_data_lo = 0;
> - ddr->capture_ecc = 0;
> - ddr->capture_attributes = 0;
> - return 0;
> - }
> - }
> - if (argc == 3) {
> - if (strcmp(argv[1], "sbecnt") == 0) {
> - val = simple_strtoul(argv[2], NULL, 10);
> - if (val > 255) {
> - printf("Incorrect Counter value, "
> - "should be 0..255\n");
> - return 1;
> - }
> -
> - val = (val << ECC_ERROR_MAN_SBEC_SHIFT);
> - val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET);
> -
> - ddr->err_sbe = val;
> - return 0;
> - } else if (strcmp(argv[1], "sbethr") == 0) {
> - val = simple_strtoul(argv[2], NULL, 10);
> - if (val > 255) {
> - printf("Incorrect Counter value, "
> - "should be 0..255\n");
> - return 1;
> - }
> -
> - val = (val << ECC_ERROR_MAN_SBET_SHIFT);
> - val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC);
> -
> - ddr->err_sbe = val;
> - return 0;
> - } else if (strcmp(argv[1], "errdisable") == 0) {
> - val = ddr->err_disable;
> -
> - if (strcmp(argv[2], "+sbe") == 0) {
> - val |= ECC_ERROR_DISABLE_SBED;
> - } else if (strcmp(argv[2], "+mbe") == 0) {
> - val |= ECC_ERROR_DISABLE_MBED;
> - } else if (strcmp(argv[2], "+mse") == 0) {
> - val |= ECC_ERROR_DISABLE_MSED;
> - } else if (strcmp(argv[2], "+all") == 0) {
> - val |= (ECC_ERROR_DISABLE_SBED |
> - ECC_ERROR_DISABLE_MBED |
> - ECC_ERROR_DISABLE_MSED);
> - } else if (strcmp(argv[2], "-sbe") == 0) {
> - val &= ~ECC_ERROR_DISABLE_SBED;
> - } else if (strcmp(argv[2], "-mbe") == 0) {
> - val &= ~ECC_ERROR_DISABLE_MBED;
> - } else if (strcmp(argv[2], "-mse") == 0) {
> - val &= ~ECC_ERROR_DISABLE_MSED;
> - } else if (strcmp(argv[2], "-all") == 0) {
> - val &= ~(ECC_ERROR_DISABLE_SBED |
> - ECC_ERROR_DISABLE_MBED |
> - ECC_ERROR_DISABLE_MSED);
> - } else {
> - printf("Incorrect err_disable field\n");
> - return 1;
> - }
> -
> - ddr->err_disable = val;
> - __asm__ __volatile__("sync");
> - __asm__ __volatile__("isync");
> - return 0;
> - } else if (strcmp(argv[1], "errdetectclr") == 0) {
> - val = ddr->err_detect;
> -
> - if (strcmp(argv[2], "mme") == 0) {
> - val |= ECC_ERROR_DETECT_MME;
> - } else if (strcmp(argv[2], "sbe") == 0) {
> - val |= ECC_ERROR_DETECT_SBE;
> - } else if (strcmp(argv[2], "mbe") == 0) {
> - val |= ECC_ERROR_DETECT_MBE;
> - } else if (strcmp(argv[2], "mse") == 0) {
> - val |= ECC_ERROR_DETECT_MSE;
> - } else if (strcmp(argv[2], "all") == 0) {
> - val |= (ECC_ERROR_DETECT_MME |
> - ECC_ERROR_DETECT_MBE |
> - ECC_ERROR_DETECT_SBE |
> - ECC_ERROR_DETECT_MSE);
> - } else {
> - printf("Incorrect err_detect field\n");
> - return 1;
> - }
> -
> - ddr->err_detect = val;
> - return 0;
> - } else if (strcmp(argv[1], "injectdatahi") == 0) {
> - val = simple_strtoul(argv[2], NULL, 16);
> -
> - ddr->data_err_inject_hi = val;
> - return 0;
> - } else if (strcmp(argv[1], "injectdatalo") == 0) {
> - val = simple_strtoul(argv[2], NULL, 16);
> -
> - ddr->data_err_inject_lo = val;
> - return 0;
> - } else if (strcmp(argv[1], "injectecc") == 0) {
> - val = simple_strtoul(argv[2], NULL, 16);
> - if (val > 0xff) {
> - printf("Incorrect ECC inject mask, "
> - "should be 0x00..0xff\n");
> - return 1;
> - }
> - val |= (ddr->ecc_err_inject &
> ~ECC_ERR_INJECT_EEIM);
> -
> - ddr->ecc_err_inject = val;
> - return 0;
> - } else if (strcmp(argv[1], "inject") == 0) {
> - val = ddr->ecc_err_inject;
> -
> - if (strcmp(argv[2], "en") == 0)
> - val |= ECC_ERR_INJECT_EIEN;
> - else if (strcmp(argv[2], "dis") == 0)
> - val &= ~ECC_ERR_INJECT_EIEN;
> - else
> - printf("Incorrect command\n");
> -
> - ddr->ecc_err_inject = val;
> - __asm__ __volatile__("sync");
> - __asm__ __volatile__("isync");
> - return 0;
> - } else if (strcmp(argv[1], "mirror") == 0) {
> - val = ddr->ecc_err_inject;
> -
> - if (strcmp(argv[2], "en") == 0)
> - val |= ECC_ERR_INJECT_EMB;
> - else if (strcmp(argv[2], "dis") == 0)
> - val &= ~ECC_ERR_INJECT_EMB;
> - else
> - printf("Incorrect command\n");
> -
> - ddr->ecc_err_inject = val;
> - return 0;
> - }
> - }
> - if (argc == 4) {
> - if (strcmp(argv[1], "testdw") == 0) {
> - addr = (u64 *) simple_strtoul(argv[2],
> NULL, 16);
> - count = simple_strtoul(argv[3], NULL, 16);
> -
> - if ((u32) addr % 8) {
> - printf("Address not alligned on "
> - "double word boundary\n");
> - return 1;
> - }
> - disable_interrupts();
> -
> - for (i = addr; i < addr + count; i++) {
> -
> - /* enable injects */
> - ddr->ecc_err_inject |=
> ECC_ERR_INJECT_EIEN;
> - __asm__ __volatile__("sync");
> - __asm__ __volatile__("isync");
> -
> - /* write memory location
> injecting errors */
> - ppcDWstore((u32 *) i, pattern);
> - __asm__ __volatile__("sync");
> -
> - /* disable injects */
> - ddr->ecc_err_inject &=
> ~ECC_ERR_INJECT_EIEN;
> - __asm__ __volatile__("sync");
> - __asm__ __volatile__("isync");
> -
> - /* read data, this generates
> ECC error */
> - ppcDWload((u32 *) i, ret);
> - __asm__ __volatile__("sync");
> -
> - /* re-initialize memory, double
> word write the location again,
> - * generates new ECC code this time */
> - ppcDWstore((u32 *) i, writeback);
> - __asm__ __volatile__("sync");
> - }
> - enable_interrupts();
> - return 0;
> - }
> - if (strcmp(argv[1], "testword") == 0) {
> - addr = (u64 *) simple_strtoul(argv[2],
> NULL, 16);
> - count = simple_strtoul(argv[3], NULL, 16);
> -
> - if ((u32) addr % 8) {
> - printf("Address not alligned on "
> - "double word boundary\n");
> - return 1;
> - }
> - disable_interrupts();
> -
> - for (i = addr; i < addr + count; i++) {
> -
> - /* enable injects */
> - ddr->ecc_err_inject |=
> ECC_ERR_INJECT_EIEN;
> - __asm__ __volatile__("sync");
> - __asm__ __volatile__("isync");
> -
> - /* write memory location
> injecting errors */
> - *(u32 *) i = 0xfedcba98UL;
> - __asm__ __volatile__("sync");
> -
> - /* sub double word write,
> - * bus will read-modify-write,
> - * generates ECC error */
> - *((u32 *) i + 1) = 0x76543210UL;
> - __asm__ __volatile__("sync");
> -
> - /* disable injects */
> - ddr->ecc_err_inject &=
> ~ECC_ERR_INJECT_EIEN;
> - __asm__ __volatile__("sync");
> - __asm__ __volatile__("isync");
> -
> - /* re-initialize memory,
> - * double word write the location again,
> - * generates new ECC code this time */
> - ppcDWstore((u32 *) i, writeback);
> - __asm__ __volatile__("sync");
> - }
> - enable_interrupts();
> - return 0;
> - }
> - }
> - cmd_usage(cmdtp);
> - return 1;
> -}
> -
> -U_BOOT_CMD(ecc, 4, 0, do_ecc,
> - "support for DDR ECC features",
> - "status - print out status info\n"
> - "ecc captureclear - clear capture regs data\n"
> - "ecc sbecnt <val> - set Single-Bit Error counter\n"
> - "ecc sbethr <val> - set Single-Bit Threshold\n"
> - "ecc errdisable <flag> - clear/set disable Memory
> Error Disable, flag:\n"
> - " [-|+]sbe - Single-Bit Error\n"
> - " [-|+]mbe - Multiple-Bit Error\n"
> - " [-|+]mse - Memory Select Error\n"
> - " [-|+]all - all errors\n"
> - "ecc errdetectclr <flag> - clear Memory Error
> Detect, flag:\n"
> - " mme - Multiple Memory Errors\n"
> - " sbe - Single-Bit Error\n"
> - " mbe - Multiple-Bit Error\n"
> - " mse - Memory Select Error\n"
> - " all - all errors\n"
> - "ecc injectdatahi <hi> - set Memory Data Path Error
> Injection Mask High\n"
> - "ecc injectdatalo <lo> - set Memory Data Path Error
> Injection Mask Low\n"
> - "ecc injectecc <ecc> - set ECC Error Injection Mask\n"
> - "ecc inject <en|dis> - enable/disable error injection\n"
> - "ecc mirror <en|dis> - enable/disable mirror byte\n"
> - "ecc testdw <addr> <cnt> - test mem region with
> double word access:\n"
> - " - enables injects\n"
> - " - writes pattern injecting errors with double
> word access\n"
> - " - disables injects\n"
> - " - reads pattern back with double word access,
> generates error\n"
> - " - re-inits memory\n"
> - "ecc testword <addr> <cnt> - test mem region with
> word access:\n"
> - " - enables injects\n"
> - " - writes pattern injecting errors with word access\n"
> - " - writes pattern with word access, generates error\n"
> - " - disables injects\n" " - re-inits memory");
> -#endif
> diff --git a/include/configs/MPC8349EMDS.h
> b/include/configs/MPC8349EMDS.h
> index 6361c45..34fb59f 100644
> --- a/include/configs/MPC8349EMDS.h
> +++ b/include/configs/MPC8349EMDS.h
> @@ -72,7 +72,7 @@
> * DDR Setup
> */
> #define CONFIG_DDR_ECC /* support DDR
> ECC function */
> -#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
> +#define CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
> #define CONFIG_SPD_EEPROM /* use SPD EEPROM for
> DDR setup*/
>
> /*
> diff --git a/include/configs/MPC8360EMDS.h
> b/include/configs/MPC8360EMDS.h
> index 8520155..fc2d456 100644
> --- a/include/configs/MPC8360EMDS.h
> +++ b/include/configs/MPC8360EMDS.h
> @@ -108,7 +108,7 @@
> #define CONFIG_SYS_83XX_DDR_USES_CS0
>
> #define CONFIG_DDR_ECC /* support DDR ECC function */
> -#define CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
> +#define CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
>
> /*
> * DDRCDR - DDR Control Driver Register
> diff --git a/include/configs/MPC8360ERDK.h
> b/include/configs/MPC8360ERDK.h
> index 6cee78a..253c733 100644
> --- a/include/configs/MPC8360ERDK.h
> +++ b/include/configs/MPC8360ERDK.h
> @@ -90,7 +90,7 @@
> #define CONFIG_SYS_83XX_DDR_USES_CS0
>
> #define CONFIG_DDR_ECC /* support DDR ECC function */
> -#define CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
> +#define CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
>
> /*
> * DDRCDR - DDR Control Driver Register
> diff --git a/include/configs/MPC837XEMDS.h
> b/include/configs/MPC837XEMDS.h
> index abeb6a2..45d1fa6 100644
> --- a/include/configs/MPC837XEMDS.h
> +++ b/include/configs/MPC837XEMDS.h
> @@ -129,7 +129,7 @@
> #define CONFIG_SYS_DDRCDR_VALUE 0x80080001 /* ODT
> 150ohm on SoC */
>
> #undef CONFIG_DDR_ECC /* support DDR ECC function */
> -#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
> +#undef CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
>
> #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
> #define CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT
> to internal IOs */
> diff --git a/include/configs/MPC837XERDB.h
> b/include/configs/MPC837XERDB.h
> index 7ef92f7..cdde255 100644
> --- a/include/configs/MPC837XERDB.h
> +++ b/include/configs/MPC837XERDB.h
> @@ -155,7 +155,7 @@
> #define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN |
> DDRCDR_ODT | DDRCDR_Q_DRN)
>
> #undef CONFIG_DDR_ECC /* support DDR ECC function */
> -#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
> +#undef CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
>
> #undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert
> ODT to internal IOs */
>
> diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
> index bf7cf82..4324210 100644
> --- a/include/configs/sbc8349.h
> +++ b/include/configs/sbc8349.h
> @@ -92,7 +92,7 @@
> * DDR Setup
> */
> #undef CONFIG_DDR_ECC /* only for ECC
> DDR module */
> -#undef CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
> +#undef CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
> #define CONFIG_SPD_EEPROM /* use SPD EEPROM for
> DDR setup*/
> #define CONFIG_SYS_83XX_DDR_USES_CS0 /* WRS; Fsl
> board uses CS2/CS3 */
>
> diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
> index d0690fe..9e3ead9 100644
> --- a/include/configs/vme8349.h
> +++ b/include/configs/vme8349.h
> @@ -74,7 +74,7 @@
> * DDR Setup
> */
> #define CONFIG_DDR_ECC /* only for ECC
> DDR module */
> -#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
> +#define CONFIG_EDAC_FSL_ECC /* use DDR ECC user commands */
> #undef CONFIG_SPD_EEPROM /* dont use SPD EEPROM
> for DDR setup*/
> #define CONFIG_SYS_83XX_DDR_USES_CS0 /* esd; Fsl board uses
> CS2/CS3 */
>
> --
> 1.6.2.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
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>
>
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