This is a simplified version of linux/arch/mips/bcm63xx/clk.c
Signed-off-by: Álvaro Fernández Rojas <nolt...@gmail.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
v2: Introduce changes suggested by Simon Glass:
- Swap common.h include to the beginning.
- Add a more detailed description.
- Switch to fdtdec_get_bool().
drivers/clk/Kconfig | 8 +++++
drivers/clk/Makefile | 1 +
drivers/clk/clk_bcm6345.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 87 insertions(+)
create mode 100644 drivers/clk/clk_bcm6345.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 5ca958c..44da716 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -20,6 +20,14 @@ config SPL_CLK
setting up clocks within SPL, and allows the same drivers to be
used as U-Boot proper.
+config CLK_BCM6345
+ bool "Clock controller driver for BCM6345"
+ depends on CLK && ARCH_BMIPS
+ default y
+ help
+ This clock driver adds support for enabling and disabling peripheral
+ clocks on BCM6345 SoCs. HW has no rate changing capabilities.
+
config CLK_BOSTON
def_bool y if TARGET_BOSTON
depends on CLK
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 01a8cd6..2746a80 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -17,6 +17,7 @@ obj-y += tegra/
obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
obj-$(CONFIG_CLK_EXYNOS) += exynos/
obj-$(CONFIG_CLK_AT91) += at91/
+obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
obj-$(CONFIG_ARCH_ASPEED) += aspeed/
obj-$(CONFIG_STM32F7) += clk_stm32f7.o
diff --git a/drivers/clk/clk_bcm6345.c b/drivers/clk/clk_bcm6345.c
new file mode 100644
index 0000000..4c7a2df
--- /dev/null
+++ b/drivers/clk/clk_bcm6345.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <nolt...@gmail.com>
+ *
+ * Derived from linux/arch/mips/bcm63xx/clk.c:
+ * Copyright (C) 2008 Maxime Bizon <mbi...@freebox.fr>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#define MAX_CLKS 32
+
+struct bcm6345_clk_priv {
+ void __iomem *regs;
+};
+
+static int bcm6345_clk_enable(struct clk *clk)
+{
+ struct bcm6345_clk_priv *priv = dev_get_priv(clk->dev);
+
+ if (clk->id >= MAX_CLKS)
+ return -EINVAL;
+
+ setbits_be32(priv->regs, BIT(clk->id));
+
+ return 0;
+}
+
+static int bcm6345_clk_disable(struct clk *clk)
+{
+ struct bcm6345_clk_priv *priv = dev_get_priv(clk->dev);
+
+ if (clk->id >= MAX_CLKS)
+ return -EINVAL;
+
+ clrbits_be32(priv->regs, BIT(clk->id));
+
+ return 0;
+}
+
+static struct clk_ops bcm6345_clk_ops = {
+ .disable = bcm6345_clk_disable,
+ .enable = bcm6345_clk_enable,
+};
+
+static const struct udevice_id bcm6345_clk_ids[] = {
+ { .compatible = "brcm,bcm6345-clk" },
+ { /* sentinel */ }
+};
+
+static int bcm63xx_clk_probe(struct udevice *dev)
+{
+ struct bcm6345_clk_priv *priv = dev_get_priv(dev);
+ fdt_addr_t addr;
+ fdt_size_t size;
+
+ addr = dev_get_addr_size_index(dev, 0, &size);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->regs = ioremap(addr, size);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(clk_bcm6345) = {
+ .name = "clk_bcm6345",
+ .id = UCLASS_CLK,
+ .of_match = bcm6345_clk_ids,
+ .ops = &bcm6345_clk_ops,
+ .probe = bcm63xx_clk_probe,
+ .priv_auto_alloc_size = sizeof(struct bcm6345_clk_priv),
+};
--
2.1.4
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