From: Jagan Teki <ja...@amarulasolutions.com>
- Removed non-fdt code (becuase which has dt support)
- Remove mx6sabresd_spl_defconfig
- Re-arrange the header includes and removed unneeded includes.
- Move the SPL code in #ifdef CONFIG_SPL_BUILD area.
Cc: Stefano Babic <sba...@denx.de>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: Michael Trimarchi <mich...@amarulasolutions.com>
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
board/freescale/mx6sabresd/MAINTAINERS | 1 -
board/freescale/mx6sabresd/mx6sabresd.c | 396 +++++---------------------------
configs/mx6sabresd_spl_defconfig | 54 -----
include/configs/mx6sabresd.h | 23 --
4 files changed, 63 insertions(+), 411 deletions(-)
delete mode 100644 configs/mx6sabresd_spl_defconfig
diff --git a/board/freescale/mx6sabresd/MAINTAINERS
b/board/freescale/mx6sabresd/MAINTAINERS
index 227c6dd..86e62e9 100644
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -5,5 +5,4 @@ F: board/freescale/mx6sabresd/
F: include/configs/mx6sabresd.h
F: configs/imx6dl_sabresd_defconfig
F: configs/imx6q_sabresd_defconfig
-F: configs/mx6sabresd_spl_defconfig
F: configs/imx6qdl_sabresd_spl_defconfig
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 7c28cc7..18c5d5d 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -6,30 +6,24 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <common.h>
+#include <miiphy.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <linux/sizes.h>
+
#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
+#include <asm/arch/crm_regs.h>
#include <asm/arch/iomux.h>
+#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/mx6-pins.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/imx-common/mxc_i2c.h>
-#include <asm/imx-common/iomux-v3.h>
+#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
+#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/video.h>
-#include <mmc.h>
-#include <fsl_esdhc.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <i2c.h>
-#include <power/pmic.h>
-#include <power/pfuze100_pmic.h>
-#include "../common/pfuze.h"
-#include <asm/arch/mx6-ddr.h>
-#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -37,28 +31,9 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PMIC 1
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
-
-#define KEY_VOL_UP IMX_GPIO_NR(1, 4)
-
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -70,80 +45,6 @@ static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
};
-#ifndef CONFIG_OF_CONTROL
-static iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- /* AR8031 PHY Reset */
- MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-
- /* Reset AR8031 PHY */
- gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
- mdelay(10);
- gpio_set_value(IMX_GPIO_NR(1, 25), 1);
- udelay(100);
-}
-#endif
-
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
- MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
- MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
static iomux_v3_cfg_t const ecspi1_pads[] = {
MX6_PAD_KEY_COL0__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_KEY_COL1__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
@@ -189,12 +90,11 @@ static iomux_v3_cfg_t const bl_pads[] = {
static void enable_backlight(void)
{
- imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads));
-
-#ifdef CONFIG_OF_CONTROL
struct gpio_desc backlight;
int ret;
+ imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads));
+
/* Set Brightness to high */
ret = dm_gpio_lookup_name("GPIO1_21", &backlight);
if (ret) {
@@ -210,9 +110,6 @@ static void enable_backlight(void)
dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT);
dm_gpio_set_value(&backlight, 1);
-#else
- gpio_direction_output(DISP0_PWR_EN, 1);
-#endif
}
static void enable_rgb(struct display_info_t const *dev)
@@ -226,27 +123,11 @@ static void enable_lvds(struct display_info_t const *dev)
enable_backlight();
}
-#ifndef CONFIG_DM_I2C
-static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-#endif
-
static void setup_spi(void)
{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
}
-#ifndef CONFIG_OF_CONTROL
iomux_v3_cfg_t const pcie_pads[] = {
MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /*
POWER */
MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /*
RESET */
@@ -256,7 +137,6 @@ static void setup_pcie(void)
{
imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads));
}
-#endif
iomux_v3_cfg_t const di0_pads[] = {
MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */
@@ -269,90 +149,6 @@ static void setup_iomux_uart(void)
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
-#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_OF_CONTROL)
-struct fsl_esdhc_cfg usdhc_cfg[3] = {
- {USDHC2_BASE_ADDR},
- {USDHC3_BASE_ADDR},
- {USDHC4_BASE_ADDR},
-};
-
-#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2)
-#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0)
-
-int board_mmc_get_env_dev(int devno)
-{
- return devno - 1;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC2_BASE_ADDR:
- ret = !gpio_get_value(USDHC2_CD_GPIO);
- break;
- case USDHC3_BASE_ADDR:
- ret = !gpio_get_value(USDHC3_CD_GPIO);
- break;
- case USDHC4_BASE_ADDR:
- ret = 1; /* eMMC/uSDHC4 is always present */
- break;
- }
-
- return ret;
-}
-
-#ifndef CONFIG_FSL_ESDHC
-int board_mmc_init(bd_t *bis)
-{
- int ret;
- int i;
-
- /*
- * According to the board_mmc_init() the following map is done:
- * (U-Boot device node) (Physical Port)
- * mmc0 SD2
- * mmc1 SD3
- * mmc2 eMMC
- */
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
- gpio_direction_input(USDHC2_CD_GPIO);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
- gpio_direction_input(USDHC3_CD_GPIO);
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- break;
- case 2:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- break;
- default:
- printf("Warning: you configured more USDHC controllers"
- "(%d) then supported by the board (%d)\n",
- i + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-#endif
-#endif
-
static int ar8031_phy_fixup(struct phy_device *phydev)
{
unsigned short val;
@@ -533,7 +329,6 @@ int overwrite_console(void)
return 1;
}
-#ifdef CONFIG_OF_CONTROL
int imx6_pcie_toggle_power(void)
{
#ifdef CONFIG_PCIE_IMX_POWER_GPIO
@@ -592,80 +387,6 @@ int imx6_pcie_toggle_reset(void)
#endif
return 0;
}
-#endif
-
-#ifndef CONFIG_OF_CONTROL
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
- setup_pcie();
-
- return cpu_eth_init(bis);
-}
-#endif
-
-#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB)
-#define USB_OTHERREGS_OFFSET 0x800
-#define UCTRL_PWR_POL (1 << 9)
-
-static iomux_v3_cfg_t const usb_otg_pads[] = {
- MX6_PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usb_hc1_pads[] = {
- MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_usb(void)
-{
- imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
- ARRAY_SIZE(usb_otg_pads));
-
- /*
- * set daisy chain for otg_pin_id on 6q.
- * for 6dl, this bit is reserved
- */
- imx_iomux_set_gpr_register(1, 13, 1, 0);
-
- imx_iomux_v3_setup_multiple_pads(usb_hc1_pads,
- ARRAY_SIZE(usb_hc1_pads));
-}
-
-int board_ehci_hcd_init(int port)
-{
- u32 *usbnc_usb_ctrl;
-
- if (port > 1)
- return -EINVAL;
-
- usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
- port * 4);
-
- setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
-
- return 0;
-}
-
-int board_ehci_power(int port, int on)
-{
- switch (port) {
- case 0:
- break;
- case 1:
- if (on)
- gpio_direction_output(IMX_GPIO_NR(1, 29), 1);
- else
- gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
- break;
- default:
- printf("MXC USB port %d not yet supported\n", port);
- return -EINVAL;
- }
-
- return 0;
-}
-#endif
int board_early_init_f(void)
{
@@ -685,46 +406,10 @@ int board_init(void)
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
-#ifndef CONFIG_DM_I2C
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-#endif
-#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB)
- setup_usb();
-#endif
-
- return 0;
-}
-
-#ifndef CONFIG_DM_PMIC
-int power_init_board(void)
-{
- struct pmic *p;
- unsigned int reg;
- int ret;
-
- p = pfuze_common_init(I2C_PMIC);
- if (!p)
- return -ENODEV;
-
- ret = pfuze_mode_init(p, APS_PFM);
- if (ret < 0)
- return ret;
-
- /* Increase VGEN3 from 2.5 to 2.8V */
- pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
- reg &= ~LDO_VOL_MASK;
- reg |= LDOB_2_80V;
- pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
-
- /* Increase VGEN5 from 2.8 to 3V */
- pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
- reg &= ~LDO_VOL_MASK;
- reg |= LDOB_3_00V;
- pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
+ setup_pcie();
return 0;
}
-#endif
#ifdef CONFIG_MXC_SPI
int board_spi_cs_gpio(unsigned bus, unsigned cs)
@@ -776,7 +461,51 @@ int checkboard(void)
#ifdef CONFIG_FSL_ESDHC
-#if defined(CONFIG_OF_CONTROL) && !defined(CONFIG_DM_MMC)
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+ MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+};
+
+static iomux_v3_cfg_t const usdhc3_pads[] = {
+ MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+};
+
+static iomux_v3_cfg_t const usdhc4_pads[] = {
+ MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
struct fsl_esdhc_cfg usdhc_cfg[3] = {
{USDHC2_BASE_ADDR},
{USDHC3_BASE_ADDR},
@@ -810,7 +539,6 @@ int board_mmc_getcd(struct mmc *mmc)
return ret;
}
-#endif
int board_mmc_init(bd_t *bis)
{
@@ -854,6 +582,8 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_SPL_OS_BOOT
+#define KEY_VOL_UP IMX_GPIO_NR(1, 4)
+
int spl_start_uboot(void)
{
gpio_direction_input(KEY_VOL_UP);
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig
deleted file mode 100644
index bba77b6..0000000
--- a/configs/mx6sabresd_spl_defconfig
+++ /dev/null
@@ -1,54 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6SABRESD=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_VIDEO=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q"
-CONFIG_BOOTDELAY=3
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PCI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MX6=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
-CONFIG_SYS_I2C_MXC=y
-CONFIG_FEC_MXC=y
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 4f6bb1b..df3ab6e 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -51,34 +51,11 @@
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
-/* I2C Configs */
-#if defined(CONFIG_SYS_I2C_MXC) && !defined(CONFIG_DM_I2C)
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
-
-/* PMIC */
-#ifndef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE100
-#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
-#endif
-
/* USB Configs */
#ifdef CONFIG_USB_EHCI_MX6
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
-# ifndef CONFIG_DM_USB
-# define CONFIG_MXC_USB_FLAGS 0
-# define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller
number */
-# define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-# endif
#endif
#endif /* __MX6QSABRESD_CONFIG_H */
--
1.9.1
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