On Tue, May 02, 2017 at 09:04:18AM +0200, Antoine Tenart wrote: > On Mon, May 01, 2017 at 11:13:27PM +0200, Maxime Ripard wrote: > > On Sun, Apr 30, 2017 at 03:29:54PM +0200, Antoine Tenart wrote: > > > > > +static void __secure sunxi_clock_leave_idle(struct sunxi_ccm_reg *ccm) > > > +{ > > > +#ifndef CONFIG_MACH_SUN7I > > > + /* switch cpuclk to osc24m */ > > > + clrsetbits_le32(&ccm->cpu_ahb_apb0_cfg, 0x3 << CPU_CLK_SRC_SHIFT, > > > + CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT); > > > +#endif > > > > Is that really needed? Whatever state we're in at this point, we just > > want to switch back to the PLL1, right? > > I think it wasn't working for some reasons if we didn't switch to osc24m > first, but that was a while ago. I can test again.
It seems to work without switching back to osc24m first. I'll remove this. Thanks! Antoine -- Antoine Ténart, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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